Michael Gschwind
Michael Gschwind
Bestätigte E-Mail-Adresse bei us.ibm.com
TitelZitiert vonJahr
Tracking operand liveness information in a computer system and performing function based on the liveness information
MK Gschwind, V Salapura
US Patent 10,078,515, 2018
Synergistic processing in cell's multicore architecture
M Gschwind, HP Hofstee, B Flachs, M Hopkins, Y Watanabe, T Yamazaki
IEEE micro 26 (2), 10-24, 2006
Multi-petascale highly efficient parallel supercomputer
S Asaad, RE Bellofatto, MA Blocksome, MA Blumrich, P Boyle, ...
US Patent 9,081,501, 2015
The ibm blue gene/q compute chip
R Haring, M Ohmacht, T Fox, M Gschwind, D Satterfield, K Sugavanam, ...
Ieee Micro 32 (2), 48-60, 2011
Optimizing compiler for the cell processor
AE Eichenberger, K O'Brien, P Wu, T Chen, PH Oden, DA Prener, ...
14th International Conference on Parallel Architectures and Compilation …, 2005
SIMD datapath coupled to scalar/vector/address/conditional data register file with selective subpath scalar processing mode
MK Gschwind, HP Hofstee, ME Hopkins
US Patent 6,839,828, 2005
Using advanced compiler technology to exploit the performance of the Cell Broadband Engine™ architecture
AE Eichenberger, JK O'Brien, KM O'Brien, P Wu, T Chen, PH Oden, ...
IBM Systems Journal 45 (1), 59-84, 2006
Dynamic binary translation and optimization
K Ebcioglu, E Altman, M Gschwind, S Sathaye
IEEE Transactions on Computers 50 (6), 529-548, 2001
Dynamically selecting a memory boundary to be used in performing operations
MK Gschwind
US Patent 10,255,068, 2019
Chip multiprocessing and the cell broadband engine
M Gschwind
Proceedings of the 3rd conference on Computing frontiers, 1-8, 2006
Methods and apparatus for reordering and renaming memory references in a multiprocessor computer system
E Altman, K Ebcioglu, M Gschwind, S Sathaye
US Patent 6,349,361, 2002
Dynamic and transparent binary translation
M Gschwind, ER Altman, S Sathaye, P Ledak, D Appenzeller
Computer 33 (3), 54-59, 2000
Optimizing pipelines for power and performance
V Srinivasan, D Brooks, M Gschwind, P Bose, V Zyuban, PN Strenski, ...
35th Annual IEEE/ACM International Symposium on Microarchitecture, 2002 …, 2002
Symmetric multi-processing system with attached processing units being able to access a shared memory without being structurally configured with an address translation mechanism
ER Altman, PG Capek, M Gschwind, HP Hofstee, JA Kahle, R Nair, ...
US Patent 6,779,049, 2004
The Cell Broadband Engine: exploiting multiple levels of parallelism in a chip multiprocessor
M Gschwind
International Journal of Parallel Programming 35 (3), 233-262, 2007
New methodology for early-stage, microarchitecture-level power-performance analysis of microprocessors
D Brooks, P Bose, V Srinivasan, MK Gschwind, PG Emma, MG Rosenfield
IBM Journal of Research and Development 47 (5.6), 653-670, 2003
IBM POWER8 processor core microarchitecture
B Sinharoy, JA Van Norstrand, RJ Eickemeyer, HQ Le, J Leenstra, ...
IBM Journal of Research and Development 59 (1), 2: 1-2: 21, 2015
Compiling optimized entry points for local-use-only function pointers
MK Gschwind, U Weigand
US Patent App. 10/108,404, 2018
Method and apparatus for stimulating heavy oil production
J Nenniger, E Nenniger
US Patent 6,883,607, 2005
Read and set floating point control register instruction
MK Gschwind, V Salapura
US Patent 10,310,814, 2019
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