| The COMPLEX reference framework for HW/SW co-design and power management supporting platform-based design-space exploration K Grüttner, PA Hartmann, K Hylla, S Rosinger, W Nebel, F Herrera, ... Microprocessors and Microsystems 37 (8), 966-980, 2013 | 58 | 2013 |
| An ESL timing & power estimation and simulation framework for heterogeneous SoCs K Grüttner, PA Hartmann, T Fandrey, K Hylla, D Lorenz, S Stattelmann, ... 2014 International Conference on Embedded Computer Systems: Architectures …, 2014 | 34 | 2014 |
| Using SystemC for an extended MATLAB/Simulink verification flow K Hylla, JH Oetjens, W Nebel 2008 Forum on Specification, Verification and Design Languages, 221-226, 2008 | 22 | 2008 |
| Towards an ESL framework for timing and power aware rapid prototyping of HW/SW systems K Grüttner, K Hylla, S Rosinger, W Nebel 2010 Forum on Specification & Design Languages (FDL 2010), 1-6, 2010 | 19 | 2010 |
| COMPLEX: Codesign and power management in platform-based design space exploration K Grüttner, PA Hartmann, K Hylla, S Rosinger, W Nebel, F Herrera, ... 2012 15th Euromicro Conference on Digital System Design, 349-358, 2012 | 12 | 2012 |
| Considering variation and aging in a full chip design methodology at system level D Helms, K Grüttner, R Eilers, M Metzdorf, K Hylla, F Poppen, W Nebel Proceedings of the 2014 Electronic System Level Synthesis Conference (ESLsyn …, 2014 | 9 | 2014 |
| Early Power & Timing Estimation of Custom Hardware Blocks based on Automatically Generated Combinatorial Macros. K Hylla, PA Hartmann, D Helms, W Nebel MBMV, 147-158, 2013 | 6 | 2013 |
| Enabling timing and power aware virtual prototyping of hw/sw systems K Grüttner, K Hylla, S Rosinger, PA Hartmann, W Nebel Workshop on Micro Power Management for Macro Systems on Chip (uPM2SoC), 2011 | 3 | 2011 |
| Hybrid logical-statistical simulation with thermal and IR-drop mapping for degradation and variation prediction D Helms, K Hylla, W Nebel Proceedings of the 2009 ACM/IEEE international symposium on Low power …, 2009 | 3 | 2009 |
| Bridging the gap between precise RT-level power/timing estimation and fast high-level simulation K Hylla PhD thesis, Carl von Ossietzky Universität Oldenburg, Dept. for Computer Science, 2014 | 2 | 2014 |
| NEEDS – Nanoelektronik-Entwurf für 3D-Systeme K Hylla, M Metzdorf, A Grünewald, K Hahn, A Heinig, U Knöchel, S Wolf, ... Zuverlässigkeit und Entwurf, 2012 | 2 | 2012 |
| A timed-value stream based ESL timing and power estimation and simulation framework for heterogeneous MPSoCs K Grüttner, PA Hartmann, T Fandrey, K Hylla, D Lorenz, ... International Journal of Parallel Programming 48 (6), 957-1007, 2020 | 1 | 2020 |
| Bridging the gap between precise RT-level power/timing estimation and fast high-level simulation: a method for automatically identifying and characterising combinational macros … K Hylla Universität Oldenburg, 2014 | 1 | 2014 |
| An advanced simulink verification flow using SystemC K Hylla, JH Oetjens, W Nebel Languages for Embedded Systems and their Applications: Selected …, 2009 | 1 | 2009 |
| Rapid Prototyping of Complex HW/SW Systems using a Timing and Power Aware ESL Framework K Grüttner, K Hylla, S Rosinger, W Nebel System Specification and Design Languages: Selected Contributions from FDL …, 2011 | | 2011 |
| COdesign and power Management in PLatform-based design space EXploration K Hylla, S Rosinger, G Palermo, A Rosti, S Bocchio | | 2011 |
| COdesign and power Management in PLatform-based design space EXploration S Rosinger, K Hylla, G Palermo | | 2010 |
| Abschlussbericht Praktikum Realzeitsysteme Sommersemester 2006 T Brock, D Denker, N Hapke, T Hesselmann, K Hylla, M Isken, J Jacobi, ... | | |
| Logisch-statistische Simulation mit Temperatur-und Spannungskartierung zur Vorhersage von Variations-und Alterungseffekten D Helms, K Hylla, W Nebel | | |
Wolfgang NebelProfessor Entwurf eingebetteter Hardware- / Softwaresysteme, Uni Oldenburg und OFFISBestätigte E-Mail-Adresse bei offis.de
