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Arthur Perais
Arthur Perais
CNRS
Bestätigte E-Mail-Adresse bei univ-grenoble-alpes.fr - Startseite
Titel
Zitiert von
Zitiert von
Jahr
Practical data value speculation for future high-end processors
A Perais, A Seznec
2014 IEEE 20th International Symposium on High Performance Computer …, 2014
852014
Take a way: Exploring the security implications of AMD's cache way predictors
M Lipp, V Hadžić, M Schwarz, A Perais, C Maurice, D Gruss
Proceedings of the 15th ACM Asia Conference on Computer and Communications …, 2020
612020
EOLE: Paving the way for an effective implementation of value prediction
A Perais, A Seznec
ACM SIGARCH Computer Architecture News 42 (3), 481-492, 2014
592014
BeBoP: A cost effective predictor infrastructure for superscalar value prediction
A Perais, A Seznec
2015 IEEE 21st International Symposium on High Performance Computer …, 2015
482015
Long term parking (ltp) criticality-aware resource allocation in ooo processors
A Sembrant, T Carlson, E Hagersten, D Black-Shaffer, A Perais, A Seznec, ...
Proceedings of the 48th International Symposium on Microarchitecture, 334-346, 2015
332015
Cost-effective speculative scheduling in high performance processors
A Perais, A Seznec, P Michaud, A Sembrant, E Hagersten
ACM SIGARCH Computer Architecture News 43 (3S), 247-259, 2015
192015
Cost effective physical register sharing
A Perais, A Seznec
2016 IEEE International Symposium on High Performance Computer Architecture …, 2016
172016
EOLE: Combining static and dynamic scheduling through value prediction to reduce complexity and increase performance
A Perais, A Seznec
ACM Transactions on Computer Systems (TOCS) 34 (2), 1-33, 2016
162016
Elastic instruction fetching
A Perais, R Sheikh, L Yen, M McIlvaine, RD Clancy
2019 IEEE International Symposium on High Performance Computer Architecture …, 2019
132019
On the interactions between value prediction and compiler optimizations in the context of EOLE
FA Endo, A Perais, A Seznec
ACM Transactions on Architecture and Code Optimization (TACO) 14 (2), 1-24, 2017
92017
Fast pipeline restart in processor with decoupled fetcher
A Perais, MS McIlvaine, RMA Al Sheikh, RD Clancy, L Yen, RW Smith
US Patent App. 16/193,935, 2019
82019
Register sharing for equality prediction
A Perais, FA Endo, A Seznec
2016 49th Annual IEEE/ACM International Symposium on Microarchitecture …, 2016
72016
Free atomics: hardware atomic operations without fences
A Asgharzadeh, JM Cebrian, A Perais, S Kaxiras, A Ros
Proceedings of the 49th Annual International Symposium on Computer …, 2022
62022
Leveraging targeted value prediction to unlock new hardware strength reduction potential
A Perais
MICRO-54: 54th Annual IEEE/ACM International Symposium on Microarchitecture …, 2021
62021
Storage-free memory dependency prediction
A Perais, A Seznec
IEEE Computer Architecture Letters 16 (2), 149-152, 2016
62016
SPF: Selective pipeline flush
VRK Naresh, R Sheikh, A Perais, HW Cain
2018 IEEE 36th International Conference on Computer Design (ICCD), 152-155, 2018
52018
Cost effective speculation with the omnipredictor
A Perais, A Seznec
Proceedings of the 27th International Conference on Parallel Architectures …, 2018
42018
A Case for Speculative Strength Reduction
A Perais
IEEE Computer Architecture Letters 20 (1), 22-25, 2021
32021
EOLE: Toward a practical implementation of value prediction
A Perais, A Seznec
IEEE Micro 35 (3), 114-124, 2015
32015
Deferring cache state updates in a non-speculative cache memory in a processor-based system in response to a speculative data request until the speculative data request becomes …
VRK Naresh, A PERAIS, RM Al Sheikh, S Priyadarshi
US Patent 11,061,824, 2021
22021
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