Eojin Lee
Titel
Zitiert von
Zitiert von
Jahr
TWiCe: Preventing Row-hammering by Exploiting Time Window Counters
E Lee, I Kang, S Lee, GE Suh, JH Ahn
Proceedings of the 46th International Symposium on Computer Architecture …, 2019
312019
TWiCe: Time Window Counter Based Row Refresh to Prevent Row-Hammering
E Lee, S Lee, GE Suh, JH Ahn
IEEE Computer Architecture Letters 17 (1), 96-99, 2018
172018
Graphene: Strong yet Lightweight Row Hammer Protection
Y Park, W Kwon, E Lee, TJ Ham, JH Ahn, JW Lee
2020 53rd Annual IEEE/ACM International Symposium on Microarchitecture …, 2020
102020
CAT-TWO: Counter-Based Adaptive Tree, Time Window Optimized for DRAM Row-Hammer Prevention
I Kang, E Lee, JH Ahn
IEEE Access 8, 17366-17377, 2020
92020
MViD: Sparse Matrix-Vector Multiplication in Mobile DRAM for Accelerating Recurrent Neural Networks
B Kim, J Chung, E Lee, W Jung, S Lee, J Choi, J Park, M Wi, S Lee, ...
IEEE Transactions on Computers 69 (7), 955-967, 2020
42020
SOUP-N-SALAD: Allocation-Oblivious Access Latency Reduction with Asymmetric DRAM Microarchitectures
Y Ro, H Cho, E Lee, D Jung, YH Son, JH Ahn, JW Lee
2017 IEEE International Symposium on High Performance Computer Architecture …, 2017
42017
TRiM: Tensor Reduction in Memory
B Kim, J Park, E Lee, M Rhu, JH Ahn
IEEE Computer Architecture Letters 20 (1), 5-8, 2020
32020
HEAAN Demystified: Accelerating Fully Homomorphic Encryption Through Architecture-centric Analysis and Optimization
W Jung, E Lee, S Kim, K Lee, N Kim, C Min, JH Cheon, JH Ahn
arXiv preprint arXiv:2003.04510, 2020
22020
Work as a team or individual: Characterizing the system-level impacts of main memory partitioning
E Lee, J Chung, D Jung, S Lee, S Li, JH Ahn
2017 IEEE International Symposium on Workload Characterization (IISWC), 156-166, 2017
22017
Evaluating the Impact of Optical Interconnects on a Multi-Chip Machine-Learning Architecture
Y Ro, E Lee, J Ahn
Electronics 7 (8), 130, 2018
12018
Reset-in-set: improving PCM write throughput by reducing the peak power of multi-bit writes
Y Ro, E Lee, JH Ahn
Electronics Letters 51 (17), 1320-1322, 2015
12015
Accelerating Fully Homomorphic Encryption Through Architecture-Centric Analysis and Optimization
W Jung, E Lee, S Kim, J Kim, N Kim, K Lee, C Min, JH Cheon, JH Ahn
IEEE Access 9, 98772-98789, 2021
2021
MaPHeA: a lightweight memory hierarchy-aware profile-guided heap allocation framework
DJ Oh, Y Moon, E Lee, TJ Ham, Y Park, JW Lee, JH Ahn
Proceedings of the 22nd ACM SIGPLAN/SIGBED International Conference on …, 2021
2021
Hardware Architecture and Software Stack for PIM Based on Commercial DRAM Technology: Industrial Product
S Lee, S Kang, J Lee, H Kim, E Lee, S Seo, H Yoon, S Lee, K Lim, H Shin, ...
2021 ACM/IEEE 48th Annual International Symposium on Computer Architecture …, 2021
2021
Accelerating Fully Homomorphic Encryption Through Microarchitecture-Aware Analysis and Optimization
W Jung, E Lee, S Kim, N Kim, K Lee, C Min, JH Cheon, JH Ahn
2021 IEEE International Symposium on Performance Analysis of Systems and …, 2021
2021
GradPIM: A Practical Processing-in-DRAM Architecture for Gradient Descent
H Kim, H Park, T Kim, K Cho, E Lee, S Ryu, HJ Lee, K Choi, J Lee
2021 IEEE International Symposium on High-Performance Computer Architecture …, 2021
2021
Preventing Row-hammering and Improving Main Memory Performance by Exploiting Time Window Counters
이어진
서울대학교 대학원, 2020
2020
SPEC CPU2017 벤치마크를 이용한 다단계 NUMA 시스템에서 메모리 접근 지연시간과 대역폭에 따른 성능 변화 연구
강인갑, 이어진, 안정호
대한전자공학회 학술대회, 731-734, 2018
2018
스토리지 기반 키-밸류 스토어를 이용한 대용량 DRAM/NVM 이종 메인 메모리 시스템의 유효성 검증
강철호, 오덕재, 이어진, 안정호
대한전자공학회 학술대회, 1112-1115, 2018
2018
Das System kann den Vorgang jetzt nicht ausführen. Versuchen Sie es später erneut.
Artikel 1–19