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Chin-Sheng Pang
Chin-Sheng Pang
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How to report and benchmark emerging field-effect transistors
Z Cheng, CS Pang, P Wang, ST Le, Y Wu, D Shahrjerdi, I Radu, ...
Nature Electronics 5 (7), 416-423, 2022
672022
Memory applications from 2D materials
CC Chiang, V Ostwal, P Wu, CS Pang, F Zhang, Z Chen, J Appenzeller
Applied Physics Reviews 8 (2), 2021
572021
Atomically Controlled Tunable Doping in High‐Performance WSe2 Devices
CS Pang, TYT Hung, A Khosravi, R Addou, Q Wang, MJ Kim, RM Wallace, ...
Advanced Electronic Materials 6 (8), 1901304, 2020
572020
Air-Stable P-Doping in Record High-Performance Monolayer WSe2 Devices
CC Chiang, HY Lan, CS Pang, J Appenzeller, Z Chen
IEEE Electron Device Letters 43 (2), 319-322, 2021
312021
WSe2 Homojunction Devices: Electrostatically Configurable as Diodes, MOSFETs, and Tunnel FETs for Reconfigurable Computing
CS Pang, CY Chen, T Ameen, S Zhang, H Ilatikhameneh, R Rahman, ...
Small 15 (41), 1902770, 2019
282019
First Demonstration of WSe2 Based CMOS-SRAM
CS Pang, N Thakuria, SK Gupta, Z Chen
2018 IEEE International Electron Devices Meeting (IEDM), 22.2. 1-22.2. 4, 2018
252018
Sub-1nm EOT WS2-FET with IDS > 600μA/μm at VDS=1V and SS < 70mV/dec at LG=40nm
CS Pang, P Wu, J Appenzeller, Z Chen
2020 IEEE International Electron Devices Meeting (IEDM), 3.4. 1-3.4. 4, 2020
232020
Mobility extraction in 2D transition metal dichalcogenide devices—Avoiding contact resistance implicated overestimation
CS Pang, R Zhou, X Liu, P Wu, TYT Hung, S Guo, ME Zaghloul, S Krylyuk, ...
Small 17 (28), 2100940, 2021
202021
Steep slope carbon nanotube tunneling field-effect transistor
CS Pang, SJ Han, Z Chen
Carbon 180, 237-243, 2021
122021
Thickness-Dependent Study of High- Performance WS2-FETs With Ultrascaled Channel Lengths
CS Pang, P Wu, J Appenzeller, Z Chen
IEEE Transactions on Electron Devices 68 (4), 2123-2129, 2021
122021
Doping-Induced Schottky-Barrier Realignment for Unipolar and High Hole Current WSe2 Devices With >108 On/Off Ratio
CS Pang, TYT Hung, A Khosravi, R Addou, RM Wallace, Z Chen
IEEE Electron Device Letters 41 (7), 1122-1125, 2020
112020
First demonstration of WSe2 CMOS inverter with modulable noise margin by electrostatic doping
CS Pang, Z Chen
2018 76th Device Research Conference (DRC), 1-2, 2018
112018
Statistical Assessment of High-Performance Scaled Double-Gate Transistors from Monolayer WS2
Z Sun, CS Pang, P Wu, TYT Hung, MY Li, SL Liew, CC Cheng, H Wang, ...
ACS nano 16 (9), 14942-14950, 2022
102022
Improvement in the breakdown endurance of high-κ dielectric by utilizing stacking technology and adding sufficient interfacial layer
CS Pang, JG Hwu
Nanoscale Research Letters 9, 1-7, 2014
102014
Gate tunable 2D WSe2 Esaki diode by SiNx doping
CS Pang, H Ilatikhameneh, Z Chen
2017 75th Annual Device Research Conference (DRC), 1-2, 2017
82017
Photo-induced tunneling currents in MOS structures with various HfO2/SiO2 stacking dielectrics
CS Pang, JG Hwu
AIP Advances 4 (4), 2014
72014
Effect of Electrons Trapping/De-Trapping at Si-SiO2 Interface on Two-State Current in MOS (p) Structure with Ultra-Thin SiO2 by Anodization
TY Chen, CS Pang, JG Hwu
ECS Journal of Solid State Science and Technology 2 (9), Q159, 2013
72013
Atomically Thin p-doping Layer and Record High Hole Current on WSe2
TYT Hung, CS Pang, X Liu, D Zemlyanov, Z Chen
2019 Device Research Conference (DRC), 121-122, 2019
32019
How to report and benchmark emerging field-effect transistors (July, 10.1038/s41928-022-00798-8, 2022)
Z Cheng, CS Pang, P Wang, ST Le, Y Wu, D Shahrjerdi, I Radu, ...
NATURE ELECTRONICS 5 (9), 620-620, 2022
2022
Low Dimension Materials for Extend/Beyond CMOS Applications
CS Pang
Purdue University, 2021
2021
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