| Area-Delay-Energy aware SRAM memory cell and M× N parallel read/write memory array design for quantum dot cellular automata A Sadhu, K Das, D De, MR Kanjilal Microprocessors and Microsystems 72, 102944, 2020 | 30 | 2020 |
| SSTRNG: self starved feedback SRAM based true random number generator using quantum cellular automata A Sadhu, K Das, D De, MR Kanjilal Microsystem Technologies 26, 2203-2215, 2020 | 13 | 2020 |
| Design and simulation of priority based dual port memory in quantum dot cellular automata K Das, A Sadhu, D De, JC Das Microprocessors and Microsystems 69, 118-137, 2019 | 13 | 2019 |
| Power analysis attack resistable hardware cryptographical circuit design using reversible logic gate in quantum cellular automata P Pain, K Das, A Sadhu, MR Kanjilal, D De Microsystem Technologies, 1-13, 2019 | 12 | 2019 |
| Experimental study on the quantum search algorithm over structured datasets using IBMQ experience K Das, A Sadhu Journal of King Saud University-Computer and Information Sciences 34 (8 …, 2022 | 11 | 2022 |
| VLSI Transistor and Interconnect Scaling Overview P Bhattacharjee, A Sadhu Journal of Electronic Design Technology 5 (1), 1-15, 2014 | 11 | 2014 |
| Novel true random number generator based hardware cryptographic architecture using quantum-dot cellular automata P Pain, K Das, A Sadhu, MR Kanjilal, D De International Journal of Theoretical Physics 58, 3118-3137, 2019 | 10 | 2019 |
| Low power design methodology in quantum-dot cellular automata A Sadhu, K Das, D De, MR Kanjilal Computers & Electrical Engineering 97, 107638, 2022 | 9 | 2022 |
| MVTRNG: majority voter-based crossed loop quantum true random number generator in QCA nanotechnology A Sadhu, K Das, D De, MR Kanjilal Computational Advancement in Communication Circuits and Systems: Proceedings …, 2020 | 6 | 2020 |
| Physical proof and simulation of ternary logic gate in ternary quantum dot cellular automata P Pain, A Sadhu, K Das, MR Kanjilal Computational Advancement in Communication Circuits and Systems: Proceedings …, 2020 | 6 | 2020 |
| Challenges and trends on post-quantum cryptography K Das, A Sadhu Internet of Things: Security and Privacy in Cyberspace, 271-293, 2022 | 4 | 2022 |
| Quantum random number generators for cryptography: Design and evaluation P Pain, A Sadhu, K Das, MR Kanjilal Computational Advancement in Communication, Circuits and Systems …, 2022 | 4 | 2022 |
| Cost optimization technique for quantum circuits A Basak, A Sadhu, K Das, KK Sharma International Journal of Theoretical Physics 58, 3158-3179, 2019 | 3 | 2019 |
| Performance Estimation of VLSI Design A Sadhu, P Bhattacherjee, S Koley | 3 | 2015 |
| Methodology of Standard Cell Library Design in. LIB Format A Sadhu, P Bhattacharjee Journal of VLSI Design Tools & Technology 4 (1), 30-38, 2014 | 3 | 2014 |
| Hybrid Genetic Algorithm Random Forest algorithm (HGARF) for improving the missing value Imputation in Hepatitis Medical Dataset P Dutta, S Paul, GG Jana, A Sadhu 2023 International Symposium on Devices, Circuits and Systems (ISDCS) 1, 01-05, 2023 | 2 | 2023 |
| Quantum annealing for solving a nurse-physician scheduling problem in covid-19 clinics K Das, S Zaman, A Sadhu, A Banerjee, S Khan viXra, 2020 | 2 | 2020 |
| Hybrid‐quantum approach for the optimal lockdown to stop the SARS‐CoV‐2 community spread subject to maximising nation economy globally K Das, S Zaman, A Khan, A Sadhu, S Bhattacharjee, FS Khan, B Sarkar IET Quantum Communication, 2024 | 1 | 2024 |
| A QCA-Based Improvised TRNG Design for the Implementation of Secured Nano Communication Protocol in ATM Services A Sadhu, K Das, D De, MR Kanjilal, P Bhattacharjee Computational Advancement in Communication, Circuits and Systems …, 2022 | 1 | 2022 |
| Energy Efficient Configurable Layout of Logic Block in QCA Frame Work for an FPGA AS ,Rimpa Dey Sarkar, Kunal Das, Debashis De, Maitreyi Ray Kanjilal Micro and Nanosystems 13 (2), 186 - 199, 2021 | 1 | 2021 |
Kunal Das,PhDAcharya Prafulla Chandra CollegeBestätigte E-Mail-Adresse bei apccollege.ac.in
