Isidoros Sideris
Cited by
Cited by
An analytical framework for estimating tco and exploring data center design space
D Hardy, M Kleanthous, I Sideris, AG Saidi, E Ozer, Y Sazeides
2013 IEEE International Symposium on Performance Analysis of Systems and …, 2013
The performance vulnerability of architectural and non-architectural arrays to permanent faults
D Hardy, I Sideris, N Ladas, Y Sazeides
2012 45th Annual IEEE/ACM International Symposium on Microarchitecture, 48-59, 2012
A bisr architecture for embedded memories
K Pekmestzi, N Axelos, I Sideris, N Moshopoulos
2008 14th IEEE International On-Line Testing Symposium, 149-154, 2008
EuroCloud: energy-conscious 3D server-on-chip for green cloud services
E Ozer, K Flautner, S Idgunji, A Saidi, Y Sazeides, B Ahsan, N Ladas, ...
Workshop on Architectural Concerns in Large Datacenters in conjunction with …, 2010
A cache based stack folding technique for high performance Java processors
I Sideris, G Economakos, K Pekmestzi
Proceedings of the 4th international workshop on Java technologies for real …, 2006
Address translation in a data processing apparatus
R Grubisic, A Burdass, D Croxford, I Sideris
US Patent 9,678,889, 2017
EETCO: A tool to estimate and explore the implications of datacenter design choices on the tco and the environmental impact
D Hardy, I Sideris, A Saidi, Y Sazeides
Workshop on Energy-efficient Computing for a Sustainable World, 2011
Eliminating energy of same-content-cell-columns of on-chip SRAM arrays
B Ahsan, L Ndreu, I Sideris, Y Sazeides, S Idgunji, E Ozer
IEEE/ACM International Symposium on Low Power Electronics and Design, 181-186, 2011
A fast multiplier-less edge detection accelerator for FPGAs
N Anastasiadis, I Sideris, K Pekmestzi
Proceedings of the 2010 ACM Symposium on Applied Computing, 510-515, 2010
Cost effective protection techniques for TCAM memory arrays
I Sideris, K Pekmestzi
IEEE Transactions on Computers 61 (12), 1778-1788, 2011
Power-efficient and low latency implementation of programmable FIR filters using carry-save arithmetic
D Bekiaris, I Sideris, G Economakos, KZ Pekmestzi
2007 14th IEEE International Conference on Electronics, Circuits and Systems …, 2007
Preventing duplicate execution by sharing a result between different processing lanes assigned micro-operations that generate the same result
I Sideris, D Croxford, A Burdass
US Patent 10,514,928, 2019
Reuse of results of back-to-back micro-operations
I Sideris, D Croxford, A Burdass
US Patent 9,933,841, 2018
Power saving by reusing results of identical micro-operations
I Sideris, D Croxford, A Burdass
US Patent 9,817,466, 2017
Tile based graphics processor and a method of performing graphics processing in a tile based graphics processor
I Sideris, MPGE Iwaniec, A Burdass, N Makljenovic, AD Engh-Halstvedt
US Patent 9,953,444, 2018
A column parity based fault detection mechanism for FIFO buffers
I Sideris, K Pekmestzi
Integration 46 (3), 265-279, 2013
A flexible architecture for DSP applications combining high performance arithmetic with small scale configurability
S Xydis, I Sideris, G Economakos, K Pekmestzi
2008 16th European Signal Processing Conference, 1-5, 2008
A predecoding technique for ILP exploitation in Java processors
I Sideris, K Pekmestzi, G Economakos
Journal of Systems Architecture 54 (7), 707-728, 2008
Novel systolic schemes for serial-parallel multiplication
I Sideris, K Anagnostopoulos, P Kalivas, K Pekmestzi
2005 13th European Signal Processing Conference, 1-4, 2005
Extending an embedded RISC microprocessor for efficient translation based Java execution
I Sideris, K Pekmestzi, G Economakos
Microprocessors and Microsystems 33 (7-8), 415-429, 2009
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