Arda Yurdakul
Arda Yurdakul
Professor of Computer Engineering, Bogazici University
Bestätigte E-Mail-Adresse bei - Startseite
Zitiert von
Zitiert von
IDMoB: IoT data marketplace on blockchain
KR Özyilmaz, M Doğan, A Yurdakul
2018 crypto valley conference on blockchain technology (CVCBT), 11-19, 2018
Designing a Blockchain-based IoT with Ethereum, swarm, and LoRa: The software solution to create high availability with minimal security risks
KR Ozyilmaz, A Yurdakul
IEEE Consumer Electronics Magazine 8 (2), 28-34, 2019
Work-in-progress: Integrating low-power IoT devices to a blockchain-based infrastructure
KR Özyılmaz, A Yurdakul
2017 International Conference on Embedded Software (EMSOFT), 1-2, 2017
An algorithm for the design of low-power hardware-efficient FIR filters
M Aktan, A Yurdakul, GÜ Dundar
IEEE Transactions on Circuits and Systems I: Regular Papers 55 (6), 1536-1545, 2008
Multiplierless realization of linear DSP transforms by using common two-term expressions
A Yurdakul, G Dündar
Journal of VLSI signal processing systems for signal, image and video …, 1999
Efficient implementations of multi-pumped multi-port register files in FPGAs
HE Yantir, S Bayar, A Yurdakul
2013 Euromicro Conference on Digital System Design, 185-192, 2013
AxleDB: A novel programmable query processing platform on FPGA
B Salami, GA Malazgirt, O Arcas-Abella, A Yurdakul, N Sonmez
Microprocessors and Microsystems 51, 142-164, 2017
Dynamic partial self-reconfiguration on spartan-iii fpgas via a parallel configuration access port (pcap)
S Bayar, A Yurdakul
2nd HiPEAC workshop on Reconfigurable Computing, HiPEAC 8, 20, 2008
Self-reconfiguration on Spartan-III FPGAs with compressed partial bitstreams via a parallel configuration access port (cPCAP) core
S Bayar, A Yurdakul
2008 Ph. D. Research in Microelectronics and Electronics, 137-140, 2008
Fractions in the canonical-signed-digit number system
JO Coleman, A Yurdakul
2001 Conference on Information Sciences and Systems 21, 2001
Approximate CPU design for IoT end-devices with learning capabilities
İ Taştan, M Karaca, A Yurdakul
Electronics 9 (1), 125, 2020
Introducing hardware-in-loop concept to the hardware/software co-design of real-time embedded systems
D Fennibay, A Yurdakul, A Sen
2010 10th IEEE International Conference on Computer and Information …, 2010
Application specific multi-port memory customization in FPGAs
GA Malazgirt, HE Yantir, A Yurdakul, S Niar
2014 24th International Conference on Field Programmable Logic and …, 2014
High level synthesis based hardware accelerator design for processing SQL queries
GA Malazgirt, N Sonmez, A Yurdakul, A Cristal, O Unsal
Proceedings of the 12th FPGAworld Conference 2015, 27-32, 2015
Fast and efficient algorithm for the multiplierless realisation of linear DSP transforms
A Yurdakul, G Dündar
IEE Proceedings-Circuits, Devices and Systems 149 (4), 205-211, 2002
An efficient heterogeneous register file implementation for FPGAs
HE Yantir, A Yurdakul
2014 IEEE International Parallel & Distributed Processing Symposium …, 2014
An efficient mapping algorithm on 2-d mesh network-on-chip with reconfigurable switches
S Bayar, A Yurdakul
2016 International Conference on Design and Technology of Integrated Systems …, 2016
A self-reconfigurable platform for general purpose image processing systems on low-cost spartan-6 FPGAs
S Bayar, A Yurdakul, M Tukel
6th International Workshop on Reconfigurable Communication-centric Systems …, 2011
Multiplierless implementation of 2-D FIR filters
A Yurdakul
Integration 38 (4), 597-613, 2005
A heterogeneous simulation and modeling framework for automation systems
D Fennibay, A Yurdakul, A Sen
IEEE Transactions on computer-aided design of integrated circuits and …, 2012
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