| Design of Simulink Model for OFDM and Comparison of FFT-OFDM and DWT-OFDM SSN R S Bodhe ” International Journal of Engineering Science and Technology (IJEST) 4 (5 …, 2012 | 36 | 2012 |
| Performance Comparison of FFT and DWT based OFDM and Selection of Mother Wavelet for OFDM SSN R S Bodhe International Journal of Computer Science and Information Technologies …, 2012 | 34 | 2012 |
| VLSI implementation of ternary gates using Tanner Tool AP Dhande, SS Narkhede, SS Dudam 2014 2nd International Conference on Devices, Circuits and Systems (ICDCS), 1-5, 2014 | 12 | 2014 |
| Design of a ternary FinFET SRAM cell MN Kishor, SS Narkhede 2016 Symposium on Colossal Data Analysis and Networking (CDAN), 1-5, 2016 | 10 | 2016 |
| Design of ternary D latch using carbon nanotube field effect transistors S Jimmy, S Narkhede 2015 2nd International Conference on Electronics and Communication Systems …, 2015 | 9 | 2015 |
| Microstrip patch antenna array for Rainfall RADAR S Thakur, SS Narkhede, T Bhuiya 2013 Fourth International Conference on Computing, Communications and …, 2013 | 8 | 2013 |
| An approach to ternary logic gates using FinFET K Jyoti, S Narkhede Proceedings of the International Conference on Advances in Information …, 2016 | 7 | 2016 |
| Implementation of ternary logic gates using FGMOS PV Gopal, S Narkhede, G Sasikala 2015 international conference on smart technologies and management for …, 2015 | 6 | 2015 |
| Design and implementation of an efficient instruction set for ternary processor S Narkhede, G Kharate, B Chaudhari International Journal of Computer Applications 83 (16), 2013 | 4 | 2013 |
| A Novel MIFGMOS Transistor based Approach for the Realization of Ternary Gates N SS, C BS, K GK ICTACT Journal on Microelectronics 1 (02), 45-56, 2015 | 2 | 2015 |
| A novel finfet based approach for the realization of ternary gates MN Kishor, S S Narkhede ICTACT Journal on Microelectronics 2 (2), 254-260, 2016 | 1 | 2016 |
| Design of Ternary D Flip-Flop Using Neuron MOSFET SH Pethe, S Narkhede IOSR Journal of VLSI and Signal Processing (IOSR-JVSP) Volume 5, 36-39, 0 | 1 | |
| DESIGN AND ANALYSIS OF LEAKY WAVE ANTENNA TO GENERATE THE BESSEL BEAM SSN Nikita Nikam ICTACT Journal on Microelectronics 5 (2), 793-799, 2019 | | 2019 |
| Design and Simulation of a 10 GSPS Low Power Sample and Hold Less Analog to Digital Converter Using Carbon Nanotube Field Effect Transistors AB Takalikar, SS Narkhede ICTACT Journal on Microelectronics 3 (2), 404-410, 2017 | | 2017 |
| SYNTHESIS AND SIMULATION OF NOVEL MULTI VALUED LOGIC PROCESSOR ARCHITECTURE SS NARKHEDE | | 2016 |
| A VHDL Implementation of Ternary Arithmetic and Logic Unit for Multi Valued Processor SS Narkhede, BS Chaudhari, GK Kharate Programmable Device Circuits and Systems, 185-193, 2015 | | 2015 |
| Design and Simulation of Ternary Logic Gates AP Dhande, SS Narkhede, SS Dudam Programmable Device Circuits and Systems 5 (12), 442-446, 2013 | | 2013 |
| Design and Fabrication of CMOS Ternary and, or/nor and not Logic Gates AP Dhande, SS Narkhede, SS Dudam University of Pune, 2011 | | 2011 |
| Design Of Ternary Arithmetic Circuits Using QDGFET S Jay, S Narkhede | | |
| Design Of Ternary Logic Gates Using CNTFET A Ughareja, S Jimmy, S Narkhede | | |
