| A polyhedral model-based framework for dataflow implementation on FPGA devices of iterative stencil loops G Natale, G Stramondo, P Bressana, R Cattaneo, D Sciuto, ... 2016 IEEE/ACM International Conference on Computer-Aided Design (ICCAD), 1-8, 2016 | 41 | 2016 |
| MAX-PolyMem: high-bandwidth polymorphic parallel memories for DFEs CB Ciobanu, G Stramondo, C de Laat, AL Varbanescu 2018 IEEE International Parallel and Distributed Processing Symposium …, 2018 | 7 | 2018 |
| EXTRA: An open platform for reconfigurable architectures CB Ciobanu, G Stramondo, AL Varbanescu, A Brokalakis, A Nikitakis, ... Proceedings of the 18th International Conference on Embedded Computer …, 2018 | 6 | 2018 |
| Towards application-centric parallel memories G Stramondo, CB Ciobanu, AL Varbanescu, C de Laat Euro-Par 2018: Parallel Processing Workshops: Euro-Par 2018 International …, 2019 | 4 | 2019 |
| μ-Genie: A Framework for Memory-Aware Spatial Processor Architecture Co-Design Exploration G Stramondo, MD Gomony, B Kozicki, C De Laat, AL Varbanescu 2020 23rd Euromicro Conference on Digital System Design (DSD), 180-184, 2020 | 2 | 2020 |
| Designing and building application‐centric parallel memories G Stramondo, CB Ciobanu, C de Laat, AL Varbanescu Concurrency and Computation: Practice and Experience 32 (15), e5485, 2020 | 2 | 2020 |
| The Case for Custom Parallel Memories: an Application-centric Analysis G Stramondo, A Varbanescu, C Ciobanu H2RC, 2016 | 2 | 2016 |
| HLS support for polymorphic parallel memories L Stornaiuolo, M Rabozzi, D Sciuto, MD Santambrogio, G Stramondo, ... 2018 IFIP/IEEE International Conference on Very Large Scale Integration …, 2018 | 1 | 2018 |
| Memory system design for application-specific hardware G Stramondo Stramondo, Giulio, 2021 | | 2021 |
| Building High-Performance, Easy-to-Use Polymorphic Parallel Memories with HLS L Stornaiuolo, M Rabozzi, MD Santambrogio, D Sciuto, CB Ciobanu, ... VLSI-SoC: Design and Engineering of Electronics Systems Based on New …, 2019 | | 2019 |
| A NoC-based custom FPGA configuration memory architecture for ultra-fast micro-reconfiguration A Kulkarni, P Bahrebar, D Stroobandt, G Stramondo, CB Ciobanu, ... 2017 International Conference on Field Programmable Technology (ICFPT), 203-206, 2017 | | 2017 |
| PolyFPGA: A tool to automatically accelerate iterative stencil loops G Stramondo University of Illinois at Chicago, 2016 | | 2016 |
| Logo IFIP VLSI-SoC: Design and Engineering of Electronics Systems Based on New Computing Paradigms N Bombieri, G Pravadelli, M Fujita, T Austin, R Reis, N Ojima, T Nakura, ... Energy 79, 106, 0 | | |
| Recherche experte (SolR) N Bombieri, G Pravadelli, M Fujita, T Austin, R Reis, N Ojima, T Nakura, ... Energy 79, 106, 0 | | |
