Low-power multiple-bit upset tolerant memory optimization S Kim, MR Guthaus 2011 IEEE/ACM International Conference on Computer-Aided Design (ICCAD), 577-581, 2011 | 9 | 2011 |
Leakage-aware redundancy for reliable sub-threshold memories S Kim, M Guthaus Proceedings of the 48th Design Automation Conference, 435-440, 2011 | 8 | 2011 |
SNM-aware power reduction and reliability improvement in 45nm SRAMs S Kim, MR Guthaus 2011 IEEE/IFIP 19th International Conference on VLSI and System-on-Chip, 204-207, 2011 | 7 | 2011 |
SEU-aware low-power memories using a multiple supply voltage array architecture S Kim, MR Guthaus VLSI-SoC: From Algorithms to Circuits and System-on-Chip Design: 20th IFIP …, 2013 | 3 | 2013 |
Dynamic voltage scaling for SEU-tolerance in low-power memories S Kim, MR Guthaus 2012 IEEE/IFIP 20th International Conference on VLSI and System-on-Chip …, 2012 | 3 | 2012 |
Low-power methodology for fault tolerant nanoscale memory design S Kim University of California, Santa Cruz, 2012 | | 2012 |