Mario Werner
Mario Werner
Verified email at iaik.tugraz.at
Title
Cited by
Cited by
Year
SGXIO: Generic Trusted I/O Path for Intel SGX
S Weiser, M Werner
Proceedings of the Seventh ACM on Conference on Data and Application …, 2017
642017
Scattercache: Thwarting cache attacks via cache set randomization
M Werner, T Unterluggauer, L Giner, M Schwarz, D Gruss, S Mangard
28th {USENIX} Security Symposium ({USENIX} Security 19), 675-692, 2019
622019
8/16/32 shades of elliptic curve cryptography on embedded processors
E Wenger, T Unterluggauer, M Werner
Proceedings of the 14th International Conference on Progress in Cryptology …, 2013
562013
TIMBER-V: Tag-Isolated Memory Bringing Fine-grained Enclaves to RISC-V
S Weiser, M Werner, F Brasser, M Malenko, S Mangard, AR Sadeghi
Network and Distributed System Security Symposium (NDSS) 2019, 2019
302019
Evaluating 16-Bit Processors for Elliptic Curve Cryptography
E Wenger, M Werner
Smart Card Research and Advanced Applications 7079, 166-181, 2011
292011
Protecting the Control Flow of Embedded Processors against Fault Attacks
M Werner, E Wenger, S Mangard
International Conference on Smart Card Research and Advanced Applications …, 2015
232015
Sponge-Based Control-Flow Protection for IoT Devices
M Werner, T Unterluggauer, D Schaffenrath, S Mangard
2018 IEEE European Symposium on Security and Privacy (EuroS&P), 214-226, 2018
192018
MEAS: memory encryption and authentication secure against side-channel attacks
T Unterluggauer, M Werner, S Mangard
Journal of cryptographic engineering 9 (2), 137-158, 2019
152019
Efficient FPGA Implementations of LowMC and Picnic⋆
D Kales, S Ramacher, C Rechberger, R Walch, M Werner
Topics in Cryptology–CT-RSA 2020: The Cryptographers’ Track at the RSA …, 2019
92019
Transparent memory encryption and authentication
M Werner, T Unterluggauer, R Schilling, D Schaffenrath, S Mangard
2017 27th International Conference on Field Programmable Logic and …, 2017
92017
Concealing secrets in embedded processors designs
H Groß, M Jelinek, S Mangard, T Unterluggauer, M Werner
International Conference on Smart Card Research and Advanced Applications …, 2016
92016
Protecting RISC-V Processors against Physical Attacks
M Werner, R Schilling, T Unterluggauer, S Mangard
2019 Design, Automation & Test in Europe Conference & Exhibition (DATE …, 2019
72019
Pointing in the Right Direction-Securing Memory Accesses in a Faulty World
R Schilling, M Werner, P Nasahl, S Mangard
Proceedings of the 34th Annual Computer Security Applications Conference …, 2018
62018
Side-channel plaintext-recovery attacks on leakage-resilient encryption
T Unterluggauer, M Werner, S Mangard
Design, Automation & Test in Europe Conference & Exhibition (DATE), 2017 …, 2017
62017
Securing conditional branches in the presence of fault attacks
R Schilling, M Werner, S Mangard
2018 Design, Automation & Test in Europe Conference & Exhibition (DATE …, 2018
52018
Securing Memory Encryption and Authentication Against Side-Channel Attacks Using Unprotected Primitives
T Unterluggauer, M Werner, S Mangard
Proceedings of the 2017 ACM on Asia Conference on Computer and …, 2017
42017
HECTOR-V: A Heterogeneous CPU Architecture for a Secure RISC-V Execution Environment
P Nasahl, R Schilling, M Werner, S Mangard
arXiv preprint arXiv:2009.05262, 2020
12020
CrypTag: Thwarting Physical and Logical Memory Vulnerabilities using Cryptographically Colored Memory
P Nasahl, R Schilling, M Werner, J Hoogerbrugge, M Medwed, ...
arXiv preprint arXiv:2012.06761, 2020
2020
Automating Seccomp Filter Generation for Linux Applications
C Canella, M Werner, D Gruss, M Schwarz
arXiv preprint arXiv:2012.02554, 2020
2020
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Articles 1–19