Folgen
Elisenda Roca
Elisenda Roca
Instituto de Microelectrónica de Sevilla, CNM, CSIC and Universidad de Sevilla
Bestätigte E-Mail-Adresse bei imse-cnm.csic.es
Titel
Zitiert von
Zitiert von
Jahr
ACE16k: the third generation of mixed-signal SIMD-CNN ACE chips toward VSoCs
A Rodríguez-Vázquez, G Liñán-Cembrano, L Carranza, E Roca-Moreno, ...
IEEE Transactions on Circuits and Systems I: Regular Papers 51 (5), 851-863, 2004
2852004
An integrated layout-synthesis approach for analog ICs
R Castro-Lopez, O Guerra, E Roca, FV Fernández
Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions …, 2008
1312008
A memetic approach to the automatic design of high-performance analog integrated circuits
B Liu, FV Fernández, G Gielen, R Castro-López, E Roca
ACM Transactions on Design Automation of Electronic Systems (TODAES) 14 (3), 42, 2009
552009
An automated design methodology of RF circuits by using Pareto-optimal fronts of EM-simulated inductors
R González-Echevarría, E Roca, R Castro-López, FV Fernández, J Sieiro, ...
IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2017
452017
CNNUC3: A Mixed-Signal 64 x 64 CNN Universal Chip
G Liñán, S Espejo, R Domínguez-Castro, Á Rodríguez-Vázquez, E Roca
Microelectronics for Neural Networks and Fuzzy Systems, International …, 1999
441999
A versatile CMOS transistor array IC for the statistical characterization of time-zero variability, RTN, BTI, and HCI
J Diaz-Fortuny, J Martin-Martinez, R Rodriguez, R Castro-Lopez, E Roca, ...
IEEE Journal of Solid-State Circuits 54 (2), 476-488, 2019
402019
Two-step RF IC block synthesis with preoptimized inductors and full layout generation in-the-loop
R Martins, N Lourenço, F Passos, R Póvoa, A Canelas, E Roca, ...
IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2019
372019
Automated Generation of the Optimal Performance Trade-Offs of Integrated Inductors
R González-Echevarría, R Castro-López, E Roca, FV Fernandez, J Sieiro, ...
Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions …, 2014
362014
Multimode Pareto fronts for design of reconfigurable analogue circuits
R Castro-López, E Roca, FV Fernández
Electronics Letters 45 (2), 95-96, 2009
362009
Reliability simulation for analog ICs: Goals, solutions, and challenges
A Toro-Frías, P Martín-Lloret, J Martin-Martinez, R Castro-López, E Roca, ...
Integration, the VLSI Journal 55, 341-348, 2016
352016
A Multilevel Bottom-up Optimization Methodology for the Automated Synthesis of RF Systems
F Passos, E Roca, J Sieiro, R Fiorelli, R Castro-López, JM López-Villegas, ...
IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2020
312020
A bioinspired collision detection algorithm for VLSI implementation
J Cuadri, G Linan, R Stafford, MS Keil, E Roca
Proc. SPIE 5119, 238-248, 2005
302005
Flexible Setup for the Measurement of CMOS Time-Dependent Variability With Array-Based Integrated Circuits
J Diaz-Fortuny, P Saraza-Canflanca, R Castro-Lopez, E Roca, ...
IEEE Transactions on Instrumentation and Measurement 69 (3), 853-864, 2020
252020
Mixed-mode impedance and reflection coefficient of two-port devices
T Carrasco, J Sieiro, JM Lopez-Villegas, N Vidal, R González Echevarría, ...
Progress in Electromagnetics Research, 130, 411-428., 2012
242012
Stopping criteria in evolutionary algorithms for multi-objective performance optimization of integrated inductors
FV Fernández, J Esteban-Muller, E Roca, R Castro-López
IEEE Congress on Evolutionary Computation, 1-8, 2010
242010
Radio-frequency inductor synthesis using evolutionary computation and Gaussian-process surrogate modeling
F Passos, E Roca, R Castro-López, FV Fernández
Applied Soft Computing 60, 495-507, 2017
232017
A two-step surrogate modeling strategy for single-objective and multi-objective optimization of radiofrequency circuits
F Passos, R González-Echevarría, E Roca, R Castro-López, ...
Soft Computing 23 (13), 4911-4925, 2019
222019
Generation of surrogate models of Pareto-optimal performance trade-offs of planar inductors
M Kotti, R González-Echevarría, FV Fernández, E Roca, J Sieiro, ...
Analog Integrated Circuits and Signal Processing 78 (1), 87-97, 2014
212014
Approximate symbolic analysis of hierarchically decomposed analog circuits
O Guerra, E Roca, FV Fernández, A Rodríguez-Vázquez
Analog Integrated Circuits and Signal Processing 31 (2), 131-145, 2002
212002
MOST-based design and scaling of synaptic interconnections in VLSI analog array processing CNN chips
A Rodríguez-Vázquez, E Roca, M Delgado-Restituto, S Espejo, ...
Journal of VLSI Signal Processing 23 (2), 239-266, 1999
211999
Das System kann den Vorgang jetzt nicht ausführen. Versuchen Sie es später erneut.
Artikel 1–20