Loading...
The system can't perform the operation now. Try again later.
Citations per year
Duplicate citations
The following articles are merged in Scholar. Their
combined citations
are counted only for the first article.
Merged citations
This "Cited by" count includes citations to the following articles in Scholar. The ones marked
*
may be different from the article in the profile.
Add co-authors
Co-authors
Follow
New articles by this author
New citations to this author
New articles related to this author's research
Email address for updates
Done
My profile
My library
Metrics
Alerts
Settings
Sign in
Sign in
Get my own profile
Cited by
All
Since 2019
Citations
12
12
h-index
2
2
i10-index
1
1
0
8
4
2022
2023
2024
1
3
8
Follow
Giovanni Brignone
PhD student,
Politecnico di Torino
Verified email at polito.it
high-level synthesis
Articles
Cited by
Title
Sort
Sort by citations
Sort by year
Sort by title
Cited by
Cited by
Year
To spike or not to spike: A digital hardware perspective on deep learning acceleration
F Ottati, C Gao, Q Chen, G Brignone, MR Casu, JK Eshraghian, ...
IEEE Journal on Emerging and Selected Topics in Circuits and Systems
, 2023
10
2023
Array-specific dataflow caches for high-level synthesis of memory-intensive algorithms on FPGAs
G Brignone, MU Jamal, MT Lazarescu, L Lavagno
IEEE Access 10, 118858-118877
, 2022
2
2022
A DSP shared is a DSP earned: HLS Task-Level Multi-Pumping for High-Performance Low-Resource Designs
G Brignone, MT Lazarescu, L Lavagno
2023 IEEE 41st International Conference on Computer Design (ICCD), 551-557
, 2023
2023
Acceleration by Separate-Process Cache for Memory-Intensive Algorithms on FPGA via High-Level Synthesis
G Brignone
Politecnico di Torino
, 2021
2021
The system can't perform the operation now. Try again later.
Articles 1–4
Show more
Privacy
Terms
Help
About Scholar
Search help