16.7 A 30GHz Digital Sub-Sampling Fractional-N PLL with 198fsrms Jitter in 65nm LP CMOS L Grimaldi, L Bertulessi, S Karman, D Cherniak, A Garghetti, C Samori, ...
2019 IEEE International Solid-State Circuits Conference-(ISSCC), 268-270, 2019
31 2019 A 30-GHz Digital Sub-Sampling Fractional- PLL With −238.6-dB Jitter-Power Figure of Merit in 65-nm LP CMOS L Bertulessi, S Karman, D Cherniak, A Garghetti, C Samori, AL Lacaita, ...
IEEE Journal of Solid-State Circuits 54 (12), 3493-3502, 2019
26 2019 Jitter minimization in digital PLLs with mid-rise TDCs L Avallone, MP Kennedy, S Karman, C Samori, S Levantino
IEEE Transactions on Circuits and Systems I: Regular Papers 67 (3), 743-752, 2019
19 2019 32.3 A 12.9-to-15.1 GHz digital PLL based on a bang-bang phase detector with adaptively optimized noise shaping achieving 107.6 fs integrated jitter M Mercandelli, A Santiccioli, SM Dartizio, A Shehata, F Tesolin, S Karman, ...
2021 IEEE International Solid-State Circuits Conference (ISSCC) 64, 445-447, 2021
14 2021 A 12.9-to-15.1-GHz digital PLL based on a bang-bang phase detector with adaptively optimized noise shaping SM Dartizio, F Tesolin, M Mercandelli, A Santiccioli, A Shehata, S Karman, ...
IEEE Journal of Solid-State Circuits 57 (6), 1723-1735, 2021
13 2021 Single-resonator, time-switched FM MEMS accelerometer with theoretical offset drift complete cancellation CR Marra, FM Ferrari, S Karman, A Tocchio, F Rizzini, G Langfelder
2018 IEEE Micro Electro Mechanical Systems (MEMS), 117-120, 2018
11 2018 32.8 A 98.4 fs-jitter 12.9-to-15.1 GHz PLL-based LO phase-shifting system with digital background phase-offset correction for integrated phased arrays A Santiccioli, M Mercandelli, SM Dartizio, F Tesolin, S Karman, A Shehata, ...
2021 IEEE International Solid-State Circuits Conference (ISSCC) 64, 456-458, 2021
10 2021 A 18.9-22.3 GHz Dual-Core Digital PLL with On-Chip Power Combination for Phase Noise and Power Scalability S Karman, F Tesolin, A Dago, M Mercandelli, C Samori, S Levantino
2021 IEEE Radio Frequency Integrated Circuits Symposium (RFIC), 67-70, 2021
8 2021 A novel topology of coupled phase-locked loops S Karman, F Tesolin, S Levantino, C Samori
IEEE Transactions on Circuits and Systems I: Regular Papers 68 (3), 989-997, 2020
5 2020 SiGe BiCMOS Building Blocks for E-and D-Band Backhauling Front-Ends G Amendola, L Boccia, F Centurelli, P Chevalier, A Fonte, S Karman, ...
2021 16th European Microwave Integrated Circuits Conference (EuMIC), 113-116, 2022
1 2022 Multi-core frequency synthesizers for MM-wave communications S Karman
Italy, 2021
2021 3-axis frequency modulated MEMS accelerometer. From system-level specifications to sensors and electronic design S KARMAN
Politecnico di Milano, 2015
2015