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Cited by
All
Since 2020
Citations
287
287
h-index
4
4
i10-index
2
2
0
100
50
25
75
2020
2021
2022
2023
2024
2025
1
32
52
86
98
16
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Co-authors
Michael Schwarz
CISPA Helmholtz Center for Information Security
Verified email at cispa.de
Daniel Gruss
Graz University of Technology
Verified email at iaik.tugraz.at
Claudio Canella
Amazon Web Services
Verified email at amazon.com
David Oswald
Security and Privacy Group, University of Birmingham
Verified email at bham.ac.uk
Moritz Lipp
Verified email at mlq.me
Martin Schwarzl
Graz University of Technology
Verified email at iaik.tugraz.at
Pietro Borrello
Sapienza University of Rome
Verified email at diag.uniroma1.it
Roland Czerny
PhD Student at IAIK, Graz University of Technology
Verified email at iaik.tugraz.at
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Catherine Easdon
Other names
Cat Easdon
Dynatrace Research
Verified email at dynatrace.com
System Security
Reverse Engineering
Side-Channel Attacks
Microarchitectural Attacks
Articles
Cited by
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Co-authors
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Year
PLATYPUS: Software-based power side-channel attacks on x86
M Lipp, A Kogler, D Oswald, M Schwarz, C Easdon, C Canella, D Gruss
2021 IEEE Symposium on Security and Privacy (SP), 355-371
, 2021
247
2021
Rapid prototyping for microarchitectural attacks
C Easdon, M Schwarz, M Schwarzl, D Gruss
31st USENIX Security Symposium (USENIX Security 22), 3861-3877
, 2022
29
2022
CustomProcessingUnit: Reverse Engineering and Customization of Intel Microcode
P Borrello, C Easdon, M Schwarzl, R Czerny, M Schwarz
2023 IEEE Security and Privacy Workshops (SPW), 285-297
, 2023
6
2023
Undocumented CPU behavior: Analyzing undocumented opcodes on Intel x86-64
C Easdon
Talk. June
, 2018
5
2018
Undocumented CPU Behaviour on x86 and RISC-V Microarchitectures: A Security Perspective
C Easdon
University of Bristol
, 2019
2019
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