|CoSA: Integrated verification for agile hardware design|
C Mattarei, M Mann, C Barrett, RG Daly, D Huff, P Hanrahan
2018 Formal Methods in Computer Aided Design (FMCAD), 1-5, 2018
|Agile SMT-Based Mapping for CGRAs with Restricted Routing Networks|
C Donovick, M Mann, C Barrett, P Hanrahan
2019 International Conference on ReConFigurable Computing and FPGAs …, 2019
|Counterexample-Guided Prophecy for Model Checking Modulo the Theory of Arrays|
M Mann, A Irfan, A Griggio, O Padon, C Barrett
arXiv preprint arXiv:2101.06825, 2021
|Creating an agile hardware design flow|
R Bahr, C Barrett, N Bhagdikar, A Carsello, R Daly, C Donovick, D Durst, ...
2020 57th ACM/IEEE Design Automation Conference (DAC), 1-6, 2020
|Unlocking the Power of Formal Hardware Verification with CoSA and Symbolic QED|
F Lonsing, K Ganesan, M Mann, SS Nuthakki, E Singh, M Srouji, Y Yang, ...
2019 IEEE/ACM International Conference on Computer-Aided Design (ICCAD), 1-8, 2019
|SMT-switch: a solver-agnostic C++ api for smt solving|
M Mann, A Wilson, C Tinelli, C Barrett
arXiv preprint arXiv:2007.01374, 2020
|Partial Order Reduction for Deep Bug Finding in Synchronous Hardware|
M Mann, C Barrett
International Conference on Tools and Algorithms for the Construction and …, 2020
|A framework for adding low-overhead, fine-grained power domains to CGRAs|
A Nayak, K Zhang, R Setaluri, A Carsello, M Mann, S Richardson, R Bahr, ...
2020 Design, Automation & Test in Europe Conference & Exhibition (DATE), 846-851, 2020
|fault: A Python Embedded Domain-Specific Language for Metaprogramming Portable Hardware Verification Components|
L Truong, S Herbst, R Setaluri, M Mann, R Daly, K Zhang, C Donovick, ...
International Conference on Computer Aided Verification, 403-414, 2020
|Bit-Precise Reasoning via Int-Blasting|
Y Zohar, A Irfan, M Mann, A Niemetz, A Nötzli, M Preiner, A Reynolds, ...
|CVC4 at the SMT Competition 2020|
C Barrett, H Barbosa, M Brain, A Irfan, M Mann, M Mohamed, A Niemetz, ...