| FPGA implementations of the round two SHA-3 candidates B Baldwin, A Byrne, L Lu, M Hamilton, N Hanley, M O'Neill, WP Marnane 2010 International Conference on Field Programmable Logic and Applications …, 2010 | 130 | 2010 |
| Fpga implementations of sha-3 candidates: cubehash, grøstl, lane, shabal and spectral hash B Baldwin, A Byrne, M Hamilton, N Hanley, RP McEvoy, W Pan, ... 2009 12th Euromicro Conference on Digital System Design, Architectures …, 2009 | 37 | 2009 |
| A hardware wrapper for the SHA-3 hash algorithms B Baldwin, A Byrne, L Lu, M Hamilton, N Hanley, M O'Neill, WP Marnane IET Irish Signals and Systems Conference (ISSC 2010), 1-6, 2010 | 31 | 2010 |
| Co-ECC scalar multiplications for hardware, software and hardware–software co-design on embedded systems B Baldwin, RR Goundar, M Hamilton, WP Marnane Journal of Cryptographic Engineering 2 (4), 221-240, 2012 | 28 | 2012 |
| FPGA implementation of an elliptic curve processor using the GLV method M Hamilton, WP Marnane 2009 International Conference on Reconfigurable Computing and FPGAs, 249-254, 2009 | 17 | 2009 |
| A comparison on FPGA of modular multipliers suitable for elliptic curve cryptography over GF (p) for specific p values M Hamilton, WP Marnane, A Tisserand 2011 21st International Conference on Field Programmable Logic and …, 2011 | 11 | 2011 |
| Side channel analysis of an automotive microprocessor MD Hamilton, M Tunstall, EM Popovici, WP Marnane IET Digital Library, 2008 | 8 | 2008 |
| Implementation of a secure TLS coprocessor on an FPGA M Hamilton, WP Marnane Microprocessors and Microsystems 40, 167-180, 2016 | 6 | 2016 |
| Cryptographic coprocessors for embedded systems M Hamilton University College Cork, 2014 | | 2014 |
