David Dice

Cited by

	All	Since 2017
Citations	6961	2703
h-index	46	29
i10-index	101	74

880

440

220

660

2003200420052006200720082009201020112012201320142015201620172018201920202021202218 29 33 45 94 187 258 369 375 387 444 475 542 872 603 566 518 502 356 156

Public access

View all

3 articles

0 articles

available

not available

Based on funding mandates

Co-authors

Alex KoganResearcher, Oracle LabsVerified email at oracle.com
Yossi LevResearch scientist at Intel, Inteon groupVerified email at intel.com
Tim HarrisMicrosoftVerified email at microsoft.com
Maurice HerlihyAn Wang Professor of Computer Science, Brown UniversityVerified email at cs.brown.edu
Pascal FelberProfessor of Computer Science, University of NeuchâtelVerified email at unine.ch
Christof FetzerTU DresdenVerified email at tu-dresden.de
Michael L. ScottArthur Gould Yates Professor, Computer Science, Univ. of RochesterVerified email at cs.rochester.edu
Timothy MerrifieldVMware Inc.Verified email at uic.edu
Wim H. Hesselinkretired at Computer Science, Groningen UniversityVerified email at rug.nl
Stephan DiestelhorstSystem Architect, XilinxVerified email at xilinx.com
Yehuda AfekTel Aviv UniversityVerified email at post.tau.ac.il
Yujie LiuGoogleVerified email at google.com
Danny HendlerProfessor of Computer Science, Ben-Gurion UniversityVerified email at cs.bgu.ac.il
Doug LeaProfessor of Computer Science, SUNY OswegoVerified email at cs.oswego.edu
Srikanta TirthapuraProfessor of Computer Engineering, Iowa State UniversityVerified email at iastate.edu
Michael SpearLehigh UniversityVerified email at cse.lehigh.edu
Luke DalessandroScientist, Indiana UniversityVerified email at iu.edu
Adam MorrisonAssociate Professor, Tel Aviv UniversityVerified email at cs.tau.ac.il
Margo SeltzerUniversity of British ColumbiaVerified email at cs.ubc.ca
Alexander MatveevResearch Scientist, MITVerified email at csail.mit.edu

David Dice

Oracle Labs

Verified email at oracle.com - Homepage

concurrency memory allocation operating systems transactional memory locks


Title Sort by citations Sort by year Sort by title	Cited by Cited by	Year
Transactional locking II D Dice, O Shalev, N Shavit International Symposium on Distributed Computing, 194-208, 2006	1274	2006
Early experience with a commercial hardware transactional memory implementation D Dice, Y Lev, M Moir, D Nussbaum Proceedings of the 14th international conference on Architectural support …, 2009	379	2009
Lock cohorting: a general technique for designing NUMA locks D Dice, VJ Marathe, N Shavit ACM SIGPLAN Notices 47 (8), 247-256, 2012	191	2012
System and method for performing incremental register checkpointing in transactional memory MS Moir, D Dice, DS Nussbaum, JR Goodman US Patent 8,560,816, 2013	153	2013
Methods and apparatus for controlling speculative execution of instructions based on a multiaccess memory condition D Dice US Patent 6,877,088, 2005	149	2005
Mostly lock-free malloc D Dice, A Garthwaite Proceedings of the 3rd international symposium on Memory management, 163-174, 2002	148	2002
Method and system for reducing abort rates in speculative lock elision using contention management mechanisms D Dice US Patent 8,914,620, 2014	142	2014
What really makes transactions faster? D Dice, N Shavit	136	2006
Methods and apparatus to implement parallel transactions D Dice, NN Shavit US Patent 7,496,716, 2009	128	2009
Advice-based feedback for transactional execution DS Nussbaum, D Dice, M Karlsson, MS Moir US Patent 8,281,185, 2012	122	2012
TLRW: return of the read-write lock D Dice, N Shavit Proceedings of the twenty-second annual ACM symposium on Parallelism in …, 2010	114	2010
Understanding tradeoffs in software transactional memory D Dice, N Shavit International Symposium on Code Generation and Optimization (CGO'07), 21-33, 2007	110	2007
Methods and apparatus to implement parallel transactions D Dice, NN Shavit US Patent 8,065,499, 2011	105*	2011
Efficient implicit privatization of transactional memory Y Lev, NN Shavit, D Dice, MA Moir US Patent 8,332,374, 2012	100	2012
NUMA-aware reader-writer locks I Calciu, D Dice, Y Lev, V Luchangco, VJ Marathe, N Shavit Proceedings of the 18th ACM SIGPLAN symposium on Principles and practice of …, 2013	99	2013
Methods and apparatus to implement parallel transactions D Dice, O Shalev, NN Shavit US Patent 7,669,015, 2010	97	2010
Methods and apparatus to implement parallel transactions D Dice, N Shavit US Patent App. 11/475,716, 2007	88	2007
Method and apparatus for executing a long transaction D Dice US Patent 7,669,040, 2010	87	2010
System and method for synchronizing access to shared variables in a virtual machine in a digital computer system D Dice, RJ Mann, RG Vandette US Patent 6,141,794, 2000	87	2000
System and method for reducing transactional abort rates using compiler optimization techniques D Dice US Patent 9,424,013, 2016	81	2016

The system can't perform the operation now. Try again later.

Articles 1–20

Citations per year

Duplicate citations

Merged citations

Add co-authorsCo-authors

Follow this author

Cited by

Co-authors