| Spara: An energy-efficient ReRAM-based accelerator for sparse graph analytics applications L Zheng, J Zhao, Y Huang, Q Wang, Z Zeng, J Xue, X Liao, H Jin 2020 IEEE International Parallel and Distributed Processing Symposium (IPDPS …, 2020 | 36 | 2020 |
| Accelerating graph convolutional networks using crossbar-based processing-in-memory architectures Y Huang, L Zheng, P Yao, Q Wang, X Liao, H Jin, J Xue 2022 IEEE International Symposium on High-Performance Computer Architecture …, 2022 | 30 | 2022 |
| GraSU: A fast graph update library for FPGA-based dynamic graph processing Q Wang, L Zheng, Y Huang, P Yao, C Gui, X Liao, H Jin, W Jiang, F Mao The 2021 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays …, 2021 | 27* | 2021 |
| Sumpa: Efficient pattern-centric graph mining with pattern abstraction C Gui, X Liao, L Zheng, P Yao, Q Wang, H Jin 2021 30th International Conference on Parallel Architectures and Compilation …, 2021 | 13 | 2021 |
| Scalagraph: A scalable accelerator for massively parallel graph processing P Yao, L Zheng, Y Huang, Q Wang, C Gui, Z Zeng, X Liao, H Jin, J Xue 2022 IEEE International Symposium on High-Performance Computer Architecture …, 2022 | 12 | 2022 |
| Fast sparse deep neural network inference with flexible spmm optimization space exploration J Xin, X Ye, L Zheng, Q Wang, Y Huang, P Yao, L Yu, X Liao, H Jin 2021 IEEE High Performance Extreme Computing Conference (HPEC), 1-7, 2021 | 10 | 2021 |
| A conflict-free scheduler for high-performance graph processing on multi-pipeline FPGAs Q Wang, L Zheng, J Zhao, X Liao, H Jin, J Xue ACM Transactions on Architecture and Code Optimization (TACO) 17 (2), 1-26, 2020 | 10 | 2020 |
| FDGLib: a communication library for efficient large-scale graph processing in FPGA-accelerated data centers YW Wu, QG Wang, L Zheng, XF Liao, H Jin, WB Jiang, R Zheng, K Hu Journal of Computer Science and Technology 36, 1051-1070, 2021 | 8 | 2021 |
| A general offloading approach for near-DRAM processing-in-memory architectures D Chen, H Jin, L Zheng, Y Huang, P Yao, C Gui, Q Wang, H Liu, H He, ... 2022 IEEE International Parallel and Distributed Processing Symposium (IPDPS …, 2022 | 7 | 2022 |
| Ready: A ReRAM-based processing-in-memory accelerator for dynamic graph convolutional networks Y Huang, L Zheng, P Yao, Q Wang, H Liu, X Liao, H Jin, J Xue IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2022 | 6 | 2022 |
| Accelerating sparse deep neural network inference using gpu tensor cores Y Sun, L Zheng, Q Wang, X Ye, Y Huang, P Yao, X Liao, H Jin 2022 IEEE High Performance Extreme Computing Conference (HPEC), 1-7, 2022 | 6 | 2022 |
| Scalable concurrency debugging with distributed graph processing L Zheng, X Liao, H Jin, J Zhao, Q Wang Proceedings of the 2018 International Symposium on Code Generation and …, 2018 | 4 | 2018 |
| Hardware-accelerated hypergraph processing with chain-driven scheduling Q Wang, L Zheng, J Yuan, Y Huang, P Yao, C Gui, A Hu, X Liao, H Jin 2022 IEEE International Symposium on High-Performance Computer Architecture …, 2022 | 3 | 2022 |
| Software systems implementation and domain-specific architectures towards graph analytics H Jin, H Qi, J Zhao, X Jiang, Y Huang, C Gui, Q Wang, X Shen, Y Zhang, ... Intelligent Computing, 2022 | 2 | 2022 |
| A Data-Centric Accelerator for High-Performance Hypergraph Processing Q Wang, L Zheng, A Hu, Y Huang, P Yao, C Gui, X Liao, H Jin, J Xue 2022 55th IEEE/ACM International Symposium on Microarchitecture (MICRO …, 2022 | 1 | 2022 |
| Productive High-Performance k-Truss Decomposition on GPU Using Linear Algebra R Wang, L Yu, Q Wang, J Xin, L Zheng 2021 IEEE High Performance Extreme Computing Conference (HPEC), 1-7, 2021 | 1 | 2021 |
| Effective runtime scheduling for high-performance graph processing on heterogeneous dataflow architecture Q Chen, L Zheng, X Liao, H Jin, Q Wang CCF Transactions on High Performance Computing 2, 362-375, 2020 | 1 | 2020 |
| Hardware accelerator for hypergraph processing and operating method thereof L Zheng, Q Wang, X Liao, HU Ao, H Jin US Patent App. 18/145,565, 2024 | | 2024 |
| Dynamic memory management apparatus and method for hls L Zheng, Q Wang, X Liao, AN Zhaozeng, H Jin US Patent App. 18/145,552, 2024 | | 2024 |
| PhGraph: A High-Performance ReRAM-Based Accelerator for Hypergraph Applications L Zheng, A Hu, Q Wang, Y Huang, H Huang, P Yao, S Xiong, X Liao, H Jin IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 2023 | | 2023 |
