| RT-level ITC'99 benchmarks and first ATPG results F Corno, MS Reorda, G Squillero IEEE Design & Test of computers 17 (3), 44-53, 2000 | 523 | 2000 |
| Dogont-ontology modeling for intelligent domotic environments D Bonino, F Corno International Semantic Web Conference, 790-803, 2008 | 286 | 2008 |
| Review of the state-of-the-art in patent information and forthcoming evolutions in intelligent patent informatics D Bonino, A Ciaramella, F Corno World Patent Information 32 (1), 30-38, 2010 | 192 | 2010 |
| Automatic test program generation: a case study F Corno, E Sánchez, MS Reorda, G Squillero IEEE Design & Test of Computers 21 (2), 102-109, 2004 | 173 | 2004 |
| GATTO: A genetic algorithm for automatic test pattern generation for large synchronous sequential circuits F Corno, P Prinetto, M Rebaudengo, MS Reorda IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 1996 | 166 | 1996 |
| Low power BIST via non-linear hybrid cellular automata F Corno, M Rebaudengo, MS Reorda, G Squillero, M Violante Proceedings 18th IEEE VLSI Test Symposium, 29-34, 2000 | 158 | 2000 |
| A test pattern generation methodology for low power consumption E Corno, P Prinetto, M Rebaudengo, MS Reorda Proceedings. 16th IEEE VLSI Test Symposium (Cat. No. 98TB100231), 453-457, 1998 | 132 | 1998 |
| Home energy consumption feedback: A user survey D Bonino, F Corno, L De Russis Energy and Buildings 47, 383-393, 2012 | 128 | 2012 |
| Fully automatic test program generation for microprocessor cores F Corno, G Cumani, MS Reorda, G Squillero 2003 Design, Automation and Test in Europe Conference and Exhibition, 1006-1011, 2003 | 128 | 2003 |
| Ontology driven semantic search D Bonino, F Corno, L Farinetti, A Bosca WSEAS Transaction on Information Science and Application 1 (6), 1597-1605, 2004 | 121 | 2004 |
| The DOG gateway: enabling ontology-based intelligent domotic environments D Bonino, E Castellina, F Corno IEEE transactions on consumer electronics 54 (4), 1656-1664, 2008 | 117 | 2008 |
| On the test of microprocessor IP cores F Corno, MS Reorda, G Squillero, M Violante Proceedings Design, Automation and Test in Europe. Conference and Exhibition …, 2001 | 103 | 2001 |
| Testability analysis and ATPG on behavioral RT-level VHDL F Corno, P Prinetto, MS Reorda Proceedings International Test Conference 1997, 753-759, 1997 | 97 | 1997 |
| New techniques for speeding-up fault-injection campaigns L Berrojo, I González, F Corno, MS Reorda, G Squillero, L Entrena, ... Proceedings 2002 Design, Automation and Test in Europe Conference and …, 2002 | 92 | 2002 |
| Intelligent energy optimization for user intelligible goals in smart home environments F Corno, F Razzak IEEE transactions on Smart Grid 3 (4), 2128-2135, 2012 | 87 | 2012 |
| Fast sequential circuit test generation using high-level and gate-level techniques EM Rudnick, R Vietti, A Ellis, F Corno, P Prinetto, MS Reorda Proceedings Design, Automation and Test in Europe, 570-576, 1998 | 85 | 1998 |
| The selfish gene algorithm: a new evolutionary optimization strategy F Corno, MS Reorda, G Squillero Proceedings of the 1998 ACM symposium on Applied Computing, 349-355, 1998 | 75 | 1998 |
| A new BIST architecture for low power circuits F Corno, M Rebaudengo, MS Reorda, M Violante European Test Workshop 1999 (Cat. No. PR00390), 160-164, 1999 | 68 | 1999 |
| New static compaction techniques of test sequences for sequential circuits F Corno, P Prinetto, M Rebaudengo, MS Reorda Proceedings European Design and Test Conference. ED & TC 97, 37-43, 1997 | 68 | 1997 |
| Advanced Techniques for GA-based sequential ATPGs F Corno, P Prinetto, M Rebaudengo, MS Reorda, R Mosca Proceedings ED&TC European Design and Test Conference, 375-379, 1996 | 65 | 1996 |
Matteo SONZA REORDAPolitecnico di Torino, Dept. of Control and Computer EngineeringVerified email at polito.it
