| A flexible high throughput multi-ASIP architecture for LDPC and turbo decoding P Murugappa, R Al-Khayat, A Baghdadi, M Jezequel Design, Automation & Test in Europe Conference & Exhibition (DATE), 2011, 1-6, 2011 | 45 | 2011 |
| Area and throughput optimized ASIP for multi-standard turbo decoding R Al-Khayat, P Murugappa, A Baghdadi, M Jézéquel 2011 22nd IEEE International Symposium on Rapid System Prototyping, 79-84, 2011 | 9 | 2011 |
| Power consumption analysis and energy efficient optimization for turbo decoder implementation P Reddy, F Clermidy, R Al Khayat, A Baghdadi, M Jezequel 2010 International Symposium on System on Chip, 12-17, 2010 | 9 | 2010 |
| Architecture efficiency of application-specific processors: A 170Mbit/s 0.644mm2multi-standard turbo decoder R Al-Khayat, A Baghdadi, M Jézéquel 2012 International symposium on system on chip (SoC), 1-7, 2012 | 4 | 2012 |
| Towards and ASIP optimized for multi-standard turbo decoding R Al Khayat Télécom Bretagne, Université de Bretagne-Sud, 2012 | | 2012 |
| Architecture Efficiency of Application-Specific Processors: a 170Mbit/s 0.644 mm2 Multi-standard Turbo Decoder R Al Khayat, A Baghdadi, M Jezequel SOC 2012 IEEE International Symposium on System-on-Chip, 2012 | | 2012 |
| Flexible Multi-ASIP SoC for Turbo/LDPC Decoder PM Velayuthan, P Reddy, R Al Khayat, JN Bazin, A Baghdadi, F Clermidy, ... SOC-SIP: colloque national du groupe de recherches System On Chip-System In …, 2012 | | 2012 |
| A flexible high throughput multi-ASIP architecture for LDPC and turbo decoding PM Velayuthan, R Al Khayat, A Baghdadi, M Jezequel DATE'11: IEEE/ACM Design, Automation and Test in Europe Conference & Exhibition, 2011 | | 2011 |
| TurbASIP power consumption analysis and optimization P Reddy, F Clermidy, R Al Khayat, A Baghdadi, M Jezequel Colloque national du groupe de recherches System On Chip-System In Package …, 2010 | | 2010 |
