| Design and applications of approximate circuits by gate-level pruning J Schlachter, V Camus, KV Palem, C Enz IEEE Transactions on Very Large Scale Integration (VLSI) Systems 25 (5 …, 2017 | 101 | 2017 |
| Approximate 32-bit floating-point unit design with 53% power-area product reduction V Camus, J Schlachter, C Enz, M Gautschi, FK Gurkaynak ESSCIRC Conference 2016: 42nd European Solid-State Circuits Conference, 465-468, 2016 | 53 | 2016 |
| Energy-efficient inexact speculative adder with high performance and accuracy control V Camus, J Schlachter, C Enz 2015 IEEE international symposium on circuits and systems (ISCAS), 45-48, 2015 | 50 | 2015 |
| A low-power carry cut-back approximate adder with fixed-point implementation and floating-point precision V Camus, J Schlachter, C Enz Proceedings of the 53rd Annual Design Automation Conference, 1-6, 2016 | 48 | 2016 |
| Opportunities for energy efficient computing: A study of inexact general purpose processors for high-performance and big-data applications P Düben, S Yenugula, J Augustine, K Palem, J Schlachter, C Enz, ... 2015 Design, Automation & Test in Europe Conference & Exhibition (DATE), 764-769, 2015 | 41 | 2015 |
| Automatic generation of inexact digital circuits by gate-level pruning J Schlachter, V Camus, C Enz, KV Palem 2015 IEEE International Symposium on Circuits and Systems (ISCAS), 173-176, 2015 | 31 | 2015 |
| Design of approximate circuits by fabrication of false timing paths: The carry cut-back adder V Camus, M Cacciotti, J Schlachter, C Enz IEEE Journal on Emerging and Selected Topics in Circuits and Systems 8 (4 …, 2018 | 29 | 2018 |
| Near/sub-threshold circuits and approximate computing: The perfect combination for ultra-low-power systems J Schlachter, V Camus, C Enz 2015 IEEE Computer Society Annual Symposium on VLSI, 476-480, 2015 | 27 | 2015 |
| Energy-efficient digital design through inexact and approximate arithmetic circuits V Camus, J Schlachter, C Enz 2015 IEEE 13th International New Circuits and Systems Conference (NEWCAS), 1-4, 2015 | 13 | 2015 |
| Overcoming the power wall by exploiting inexactness and emerging cots architectural features: Trading precision for improving application quality M Fagan, J Schlachter, K Yoshii, S Leyffer, K Palem, M Snir, SM Wild, ... 2016 29th IEEE International System-on-Chip Conference (SOCC), 241-246, 2016 | 12 | 2016 |
| Hardware acceleration of HDR-image tone mapping on an FPGA-CPU platform through high-level synthesis M Cacciotti, V Camus, J Schlachter, A Pezzotta, C Enz 2018 31st IEEE International System-on-Chip Conference (SOCC), 158-162, 2018 | 9 | 2018 |
| System and method for optimization of digital circuits with timing and behavior co-designed by introduction and exploitation of false paths V Camus, J Schlachter, C Enz US Patent App. 15/159,836, 2017 | 9 | 2017 |
| Design of energy-efficient discrete cosine transform using pruned arithmetic circuits J Schlachter, V Camus, C Enz 2016 IEEE International Symposium on Circuits and Systems (ISCAS), 341-344, 2016 | 7 | 2016 |
| Designing inexact systems efficiently using elimination heuristics S Venkataraman, A Kumar, J Schlachter, C Enz 2015 Design, Automation & Test in Europe Conference & Exhibition (DATE), 758-763, 2015 | 2 | 2015 |
| Trading off Energy versus Accuracy in Modern Computing Systems: From Digital Circuit Design to Programming Techniques JLM Schlachter EPFL, 2018 | 1 | 2018 |
| Cross-Layer Inexact Design for Low-Power Applications V Camus, G Karakonstantis, J Schlachter, AP Burg, C Enz NanoTera Annual Meeting, 2014 | 1 | 2014 |
| Method and device for projecting an image with improved safety J Schlachter, N Abele US Patent 10,271,027, 2019 | | 2019 |
| Method and device for projecting an image with improved safety J Schlachter, N Abele US Patent 9,787,959, 2017 | | 2017 |
| A study on the energy-precision tradeoffs on commercially available processors and SoCs with an EPI based energy model J Schlachter, M Fagan, K Palem, C Enz 2017 30th IEEE International System-on-Chip Conference (SOCC), 334-339, 2017 | | 2017 |
| Overcoming the Power Wall by Exploiting Application Inexactness and Emerging COTS Architectural Features M Fagan, J Schlachter, K Yoshii, S Leyffer, K Palem, M Snir, SM Wild, ... Argonne National Lab.(ANL), Argonne, IL (United States), 2016 | | 2016 |
Christian EnzEcole Polytechnique Fédérale de Lausanne (EPFL)Bestätigte E-Mail-Adresse bei epfl.ch
