Peter Athanas
Peter Athanas
Emeritus Professor of Electrical and Computer Engineering
Bestätigte E-Mail-Adresse bei
Zitiert von
Zitiert von
Processor reconfiguration through instruction-set metamorphosis
PM Athanas, HF Silverman
Computer 26 (3), 11-18, 1993
Quantitative analysis of floating point arithmetic on FPGA based custom computing machines
N Shirazi, A Walters, P Athanas
Proceedings IEEE Symposium on FPGAs for Custom Computing Machines, 155-162, 1995
Real-time image processing on a custom computing platform
PM Athanas, AL Abbott
Computer 28 (2), 16-25, 1995
PRISM-II compiler and architecture
M Wazlowski, L Agarwal, T Lee, A Smith, E Lam, P Athanas, H Silverman, ...
[1993] Proceedings IEEE Workshop on FPGAs for Custom Computing Machines, 9-16, 1993
Worm-hole run-time reconfigurable processor field programmable gate array (FPGA)
P Athanas, RA Bittner Jr
US Patent 5,828,858, 1998
Modular multiport data hub
PM Athanas, GA Portanova
US Patent 4,724,520, 1988
Cognitive radio and networking research at Virginia Tech
AB MacKenzie, JH Reed, P Athanas, CW Bostian, RM Buehrer, ...
Proceedings of the IEEE 97 (4), 660-688, 2009
Torc: towards an open-source tool flow
N Steiner, A Wood, H Shojaei, J Couch, P Athanas, M French
Proceedings of the 19th ACM/SIGDA international symposium on Field …, 2011
Evaluation of rapid context switching on a CSRC device
DI Lehn, K Puttegowda, JH Park, P Athanas, M Jones
Proceedings of the International Conference on Engineering of Reconfigurable …, 2002
Lecture notes in computer science (including subseries lecture notes in artificial intelligence and lecture notes in bioinformatics): Preface
M Abe, K Aoki, G Ateniese, R Avanzi, Z Beerliová, O Billet, A Biryukov, ...
Lecture Notes in Computer Science (including subseries Lecture Notes in …, 2006
A soft radio architecture for reconfigurable platforms
S Srikanteswara, JH Reed, P Athanas, R Boyle
IEEE Communications Magazine 38 (2), 140-147, 2000
Colt: An experiment in wormhole run-time reconfiguration
R Bittner, PM Athanas, M Musgrove
High-Speed Computing, Digital Signal Processing, and Filtering Using …, 1996
Wormhole run-time reconfiguration
R Bittner, P Athanas
Proceedings of the 1997 ACM fifth international symposium on Field …, 1997
An overview of configurable computing machines for software radio handsets
S Srikanteswara, RC Palat, JH Reed, P Athanas
IEEE communications magazine 41 (7), 134-141, 2003
Finding lines and building pyramids with Splash 2
AL Abbott, PM Athanas, L Chen, RL Elliott
Proceedings of IEEE Workshop on FPGA's for Custom Computing Machines, 155-163, 1994
A versatile framework for FPGA field updates: an application of partial self-reconfiguration
RJ Fong, SJ Harper, PM Athanas
14th IEEE International Workshop on Rapid Systems Prototyping, 2003 …, 2003
An adaptive machine architecture and compiler for dynamic processor reconfiguration
PM Athanas
Brown University, 1992
OpenPR: An open-source partial-reconfiguration toolkit for Xilinx FPGAs
AA Sohanghpurwala, P Athanas, T Frangieh, A Wood
2011 IEEE International Symposium on Parallel and Distributed Processing …, 2011
Scheduling and partitioning ANSI-C programs onto multi-FPGA CCM architectures
1996 Proceedings IEEE Symposium on FPGAs for Custom Computing Machines, 178-187, 1996
Wires on demand: Run-time communication synthesis for reconfigurable computing
P Athanas, J Bowen, T Dunham, C Patterson, J Rice, M Shelburne, ...
2007 International Conference on Field Programmable Logic and Applications …, 2007
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