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Ansh Rupani
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A physical synthesis flow for early technology evaluation of silicon nanowire based reconfigurable FETs
S Rai, A Rupani, D Walter, M Raitza, A Heinzig, T Baldauf, J Trommer, ...
2018 Design, Automation & Test in Europe Conference & Exhibition (DATE), 605-608, 2018
342018
Hardware watermarking using polymorphic inverter designs based on reconfigurable nanotechnologies
S Rai, A Rupani, P Nath, A Kumar
2019 IEEE Computer Society Annual Symposium on VLSI (ISVLSI), 663-669, 2019
312019
Security promises and vulnerabilities in emerging reconfigurable nanotechnology-based circuits
S Rai, S Patnaik, A Rupani, J Knechtel, O Sinanoglu, A Kumar
IEEE Transactions on Emerging Topics in Computing 10 (2), 763-778, 2020
272020
Exploiting emerging reconfigurable technologies for secure devices
A Rupani, S Rai, A Kumar
2019 22nd Euromicro Conference on Digital System Design (DSD), 668-671, 2019
102019
A survey of FPGA logic cell designs in the light of emerging technologies
S Rai, P Nath, A Rupani, SK Vishvakarma, A Kumar
IEEE Access 9, 91564-91574, 2021
82021
Efficient privacy-aware federated learning by elimination of downstream redundancy
A Lohana, A Rupani, S Rai, A Kumar
IEEE Design & Test, 73-81, 2021
52021
Metastability with Emerging Reconfigurable Transistors: Exploiting Ambipolarity for Throughput
A Bhattacharjee, S Rai, A Rupani, M Raitza, A Kumar
2021 IFIP/IEEE 29th International Conference on Very Large Scale Integration …, 2021
22021
END-TRUE: Emerging Nanotechnology-Based Double-Throughput True Random Number Generator
S Rai, N Gupta, A Bhattacharjee, A Rupani, M Raitza, J Trommer, ...
IFIP/IEEE International Conference on Very Large Scale Integration-System on …, 2021
2021
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