Toshihiro Hanawa
Toshihiro Hanawa
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Zitiert von
Zitiert von
D-cloud: Design of a software testing environment for reliable distributed systems using cloud computing technology
T Banzai, H Koizumi, R Kanbayashi, T Imada, T Hanawa, M Sato
2010 10th IEEE/ACM International Conference on Cluster, Cloud and Grid …, 2010
Large-scale software testing environment using cloud computing technology for dependable parallel and distributed systems
T Hanawa, T Banzai, H Koizumi, R Kanbayashi, T Imada, M Sato
2010 Third International Conference on Software Testing, Verification, and …, 2010
Interconnection network for tightly coupled accelerators architecture
T Hanawa, Y Kodama, T Boku, M Sato
2013 IEEE 21st Annual Symposium on High-Performance Interconnects, 79-82, 2013
XcalableACC: Extension of XcalableMP PGAS language using OpenACC for accelerator clusters
M Nakao, H Murai, T Shimosaka, A Tabuchi, T Hanawa, Y Kodama, ...
2014 First Workshop on Accelerator Programming using Directives, 27-36, 2014
Tightly coupled accelerators architecture for minimizing communication latency among accelerators
T Hanawa, Y Kodama, T Boku, M Sato
2013 IEEE International Symposium on Parallel & Distributed Processing …, 2013
PEACH2: an FPGA-based PCIe network device for tightly coupled accelerators
Y Kodama, T Hanawa, T Boku, M Sato
ACM SIGARCH Computer Architecture News 42 (4), 3-8, 2014
Multistage interconnection networks with multiple outlets
T Hanawa, H Amano, Y Fujikawa
1994 International Conference on Parallel Processing Vol. 1 1, 1-8, 1994
Evaluation of multicore processors for embedded systems by parallel benchmark program using OpenMP
T Hanawa, M Sato, J Lee, T Imada, H Kimura, T Boku
International Workshop on OpenMP, 15-27, 2009
DS-Bench Toolset: Tools for dependability benchmarking with simulation and assurance
H Fujita, Y Matsuno, T Hanawa, M Sato, S Kato, Y Ishikawa
IEEE/IFIP International conference on dependable systems and networks (DSN …, 2012
Customizing virtual machine with fault injector by integrating with SpecC device model for a software testing environment D-Cloud
T Hanawa, H Koizumi, T Banzai, M Sato, S Miura, T Ishii, H Takamizawa
2010 IEEE 16th Pacific Rim International Symposium on Dependable Computing …, 2010
Demonstration of 10-Gbps real-time Reed–Solomon decoding using GPU direct transfer and kernel scheduling for flexible access systems
T Suzuki, SY Kim, J Kani, T Hanawa, KI Suzuki, A Otaka
Journal of Lightwave Technology 36 (10), 1875-1881, 2018
MINC: Multistage interconnection network with cache control mechanism
T Hanawa, T Kamei, H Yasukawa, K Nishimura, H Amano
IEICE TRANSACTIONS on Information and Systems 80 (9), 863-870, 1997
RI2N/DRV: Multi-link Ethernet for high-bandwidth and fault-tolerant network on PC clusters
S Miura, T Hanawa, T Yonemoto, T Boku, M Sato
2009 IEEE International Symposium on Parallel & Distributed Processing, 1-7, 2009
Parallelization of cipher algorithm on CPU/GPU for real-time software-defined access network
T Suzuki, SY Kim, J Kani, KI Suzuki, A Otaka, T Hanawa
2015 Asia-Pacific Signal and Information Processing Association Annual …, 2015
Reduction calculator in an FPGA based switching Hub for high performance clusters
T Kuhara, C Tsuruta, T Hanawa, H Amano
2015 25th International Conference on Field Programmable Logic and …, 2015
1-(4-Dimethylaminophenylcarbonyl)-3-aminopyrrolidine: A derivatization reagent for enantiomeric separation and sensitive detection of chiral carboxylic acids by LC
S Ogawa, H Tadokoro, M Sato, T Hanawa, T Higashi
J. Chromatogr. B 940, 7-14, 2013
Low-power and high-performance communication mechanism for dependable embedded systems
T Hanawa, T Boku, S Miura, T Okamoto, M Sato, K Arimoto
2008 International Workshop on Innovative Architecture for Future Generation …, 2008
From flops to bytes: disruptive change in high-performance computing towards the post-moore era
S Matsuoka, H Amano, K Nakajima, K Inoue, T Kudoh, N Maruyama, ...
Proceedings of the ACM International Conference on Computing Frontiers, 274-281, 2016
GPU/CPU work sharing with parallel language XcalableMP-dev for parallelized accelerated computing
T Odajima, T Boku, T Hanawa, J Lee, M Sato
2012 41st International Conference on Parallel Processing Workshops, 97-106, 2012
Peach: A multicore communication system on chip with PCI Express
S Otani, H Kondo, I Nonomura, T Hanawa, S Miura, T Boku
IEEE micro 31 (6), 39-50, 2011
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