Follow
Habib MEHREZ
Habib MEHREZ
Professeur d'informatique, Sorbonne Université, Campus Pierre et Marie Curie (UPMC) Paris VI
Verified email at lip6.fr - Homepage
Title
Cited by
Cited by
Year
FPGA architectures: An overview
U Farooq, Z Marrakchi, H Mehrez, U Farooq, Z Marrakchi, H Mehrez
Tree-Based Heterogeneous FPGA Architectures: Application Specific …, 2012
227*2012
Efficient polyphase decomposition of comb decimation filters in/spl Sigma//spl utri/analog-to-digital converters
H Aboushady, Y Dumonteix, MM Louerat, H Mehrez
IEEE Transactions on Circuits and Systems II: Analog and Digital Signal …, 2001
2032001
FPGA interconnect topologies exploration
Z Marrakchi, H Mrabet, U Farooq, H Mehrez
International Journal of Reconfigurable Computing 2009 (1), 259837, 2009
762009
Hierarchical FPGA clustering based on multilevel partitioning approach to improve routability and reduce power dissipation
Z Marrakchi, H Mrabet, H Mehrez
2005 International Conference on Reconfigurable Computing and FPGAs …, 2005
362005
Exploration of heterogeneous FPGA architectures
U Farooq, H Parvez, H Mehrez, Z Marrakchi
International Journal of Reconfigurable Computing 2011 (1), 121404, 2011
302011
Architecture and design methodology of the RBF-DDA neural network
M Aberbour, H Mehrez
1998 IEEE International Symposium on Circuits and Systems (ISCAS) 3, 199-202, 1998
271998
Three-dimensional integration: A more than Moore technology
V Pangracious, Z Marrakchi, H Mehrez, V Pangracious, Z Marrakchi, ...
Three-dimensional design methodologies for tree-based FPGA architecture, 13-41, 2015
252015
Application-specific mesh-based heterogeneous FPGA architectures
H Parvez, H Mehrez
Springer Science & Business Media, 2010
252010
Efficient tree topology for FPGA interconnect network
M Zied, M Hayder, A Emna, M Habib
Proceedings of the 18th ACM Great Lakes symposium on VLSI, 321-326, 2008
242008
A family of redundant multipliers dedicated to fast computation for signal processing
Y Dumonteix, H Mehrez
2000 IEEE International Symposium on Circuits and Systems (ISCAS) 5, 325-328, 2000
222000
Mesh of tree: unifying mesh and MFPGA for better device performances
Z Marrakchi, H Mrabet, C Masson, H Mehrez
First International Symposium on Networks-on-Chip (NOCS'07), 243-252, 2007
212007
Low power Comb Decimation Filter Using Polyphase Decomposition For Mono-Bit
Y Dumonteix, H Aboushady, H Mehrez, MM Louыrat
Int. Conf. Signal Processing Applications and Technology, 2000
202000
Three-Dimensional Design Methodologies for Tree-based FPGA Architecture
V Pangracious, Z Marrakchi, H Mehrez
Springer International Publishing, 2015
192015
AES-GCM and AEGIS: efficient and high speed hardware implementations
KM Abdellatif, R Chotin-Avot, H Mehrez
Journal of Signal Processing Systems 88, 1-12, 2017
182017
Pre-silicon verification using multi-FPGA platforms: A review
U Farooq, H Mehrez
Journal of Electronic Testing 37 (1), 7-24, 2021
172021
ASIF: Application specific inflexible FPGA
H Parvez, H Mehrez, H Parvez, H Mehrez
Application-Specific Mesh-based Heterogeneous FPGA Architectures, 77-101, 2011
172011
Stratus: A procedural circuit description language based upon Python
S Belloeil, D Dupuis, C Masson, JP Chaput, H Mehrez
2007 Internatonal Conference on Microelectronics, 261-264, 2007
172007
Routing algorithm for multi-fpga based systems using multi-point physical tracks
Q Tang, H Mehrez, M Tuna
2013 International symposium on rapid system prototyping (RSP), 2-8, 2013
152013
Performance analysis and optimization of high density tree-based 3d multilevel FPGA
V Pangracious, Z Marrakchi, E Amouri, H Mehrez
International Symposium on Applied Reconfigurable Computing, 197-209, 2013
152013
FPGA architectures: an overview, in tree-based heterogeneous FPGA architectures
U Farooq, Z Marrakchi, H Mehrez, U Farooq, Z Marrakchi, H Mehrez
Springer New York, 2012
152012
The system can't perform the operation now. Try again later.
Articles 1–20