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Mark Horowitz
Mark Horowitz
Professor of Electrical Engineering and Computer Science
Bestätigte E-Mail-Adresse bei ee.stanford.edu
Titel
Zitiert von
Zitiert von
Jahr
EIE: Efficient inference engine on compressed deep neural network
S Han, X Liu, H Mao, J Pu, A Pedram, MA Horowitz, WJ Dally
ACM SIGARCH Computer Architecture News 44 (3), 243-254, 2016
32402016
Light field photography with a hand-held plenoptic camera
R Ng, M Levoy, M Brédif, G Duval, M Horowitz, P Hanrahan
Stanford university, 2005
32172005
The future of wires
R Ho, KW Mai, MA Horowitz
Proceedings of the IEEE 89 (4), 490-504, 2001
19672001
1.1 computing's energy problem (and what we can do about it)
M Horowitz
2014 IEEE international solid-state circuits conference digest of technical …, 2014
19452014
High performance imaging using large camera arrays
B Wilburn, N Joshi, V Vaish, EV Talvala, E Antunez, A Barth, A Adams, ...
ACM siggraph 2005 papers, 765-776, 2005
16242005
The stanford dash multiprocessor
D Lenoski, J Laudon, K Gharachorloo, WD Weber, A Gupta, J Hennessy, ...
Computer 25 (3), 63-79, 1992
14851992
Forwarding metamorphosis: Fast programmable match-action processing in hardware for SDN
P Bosshart, G Gibb, HS Kim, G Varghese, N McKeown, M Izzard, F Mujica, ...
ACM SIGCOMM Computer Communication Review 43 (4), 99-110, 2013
13642013
Light field microscopy
M Levoy, R Ng, A Adams, M Footer, M Horowitz
Acm siggraph 2006 papers, 924-934, 2006
12242006
The stanford flash multiprocessor
J Kuskin, D Ofelt, M Heinrich, J Heinlein, R Simoni, K Gharachorloo, ...
Proceedings of the 21ST annual international symposium on Computer …, 1994
10911994
"Signal Delays in RC Tree Networks,"
J Rubinstein, P Penfield, M Horowitz
IEEE Transactions on Computer Aided Design 2 (3), 202-211, 1983
10811983
Architectural support for copy and tamper resistant software
D Lie, C Thekkath, M Mitchell, P Lincoln, D Boneh, J Mitchell, M Horowitz
Acm Sigplan Notices 35 (11), 168-177, 2000
10722000
Energy dissipation in general purpose microprocessors
R Gonzalez, M Horowitz
IEEE Journal of solid-state circuits 31 (9), 1277-1284, 1996
9291996
An evaluation of directory schemes for cache coherence
A Agarwal, R Simoni, J Hennessy, M Horowitz
ACM SIGARCH Computer Architecture News 16 (2), 280-298, 1988
8751988
Supply and threshold voltage scaling for low power CMOS
R Gonzalez, BM Gordon, MA Horowitz
IEEE Journal of Solid-State Circuits 32 (8), 1210-1216, 1997
8371997
Understanding sources of inefficiency in general-purpose chips
R Hameed, W Qadeer, M Wachs, O Azizi, A Solomatnikov, BC Lee, ...
Proceedings of the 37th annual international symposium on Computer …, 2010
6882010
Tetris: Scalable and efficient neural network acceleration with 3d memory
M Gao, J Pu, X Yang, M Horowitz, C Kozyrakis
Proceedings of the Twenty-Second International Conference on Architectural …, 2017
6682017
Integrated circuit I/O using high performance bus interface
M Farmwald, M Horowitz
US Patent 5,319,755, 1994
651*1994
Smart memories: A modular reconfigurable architecture
K Mai, T Paaske, N Jayasena, R Ho, WJ Dally, M Horowitz
Proceedings of the 27th annual international symposium on Computer …, 2000
6162000
A semidigital dual delay-locked loop
S Sidiropoulos, MA Horowitz
IEEE Journal of Solid-State Circuits 32 (11), 1683-1692, 1997
6041997
Clustered voltage scaling technique for low-power design
K Usami, M Horowitz
Proceedings of the 1995 international symposium on Low power design, 3-8, 1995
5941995
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