Dana Vantrease
Dana Vantrease
Amazon Web Services
Bestätigte E-Mail-Adresse bei cs.wisc.edu
Zitiert von
Zitiert von
Corona: System implications of emerging nanophotonic technology
D Vantrease, R Schreiber, M Monchiero, M McLaren, NP Jouppi, ...
ACM SIGARCH Computer Architecture News 36 (3), 153-164, 2008
Devices and architectures for photonic chip-scale integration
J Ahn, M Fiorentino, RG Beausoleil, N Binkert, A Davis, D Fattal, ...
Applied Physics A 95 (4), 989-997, 2009
Light speed arbitration and flow control for nanophotonic interconnects
D Vantrease, N Binkert, R Schreiber, MH Lipasti
2009 42nd Annual IEEE/ACM International Symposium on Microarchitecture …, 2009
A nanophotonic interconnect for high-performance many-core computation
RG Beausoleil, J Ahn, N Binkert, A Davis, D Fattal, M Fiorentino, ...
2008 16th IEEE Symposium on High Performance Interconnects, 182-189, 2008
An evaluation of server consolidation workloads for multi-core designs
NE Jerger, D Vantrease, M Lipasti
2007 IEEE 10th International Symposium on Workload Characterization, 47-56, 2007
Atomic coherence: Leveraging nanophotonics to build race-free cache coherence protocols
D Vantrease, MH Lipasti, N Binkert
2011 IEEE 17th International Symposium on High Performance Computer …, 2011
Commod bods and frybread power: Government food aid in American Indian culture
D Vantrease
The Journal of American Folklore 126 (499), 55-69, 2013
Optical tokens in many-core processors
DM Vantrease
University of Wisconsin--Madison, 2010
Write-only dataless state for maintaining cache coherency
CE Koob, DM Vantrease
US Patent 9,767,025, 2017
Hybrid write-through/write-back cache policy managers, and related systems and methods
PG Sassone, CE Koob, DM Vantrease, SK Venkumahanti, L Codrescu
US Patent 10,025,711, 2018
Nanophotonic barriers
N Binkert, A Davis, M Lipasti, R Schreiber, D Vantrease
Workshop on Photonic Interconnects & Computer Architecture (in conjunction …, 2009
Optical broadcast systems and methods
NL Binkert, DM Vantrease, M McLaren, M Fiorentino
US Patent 8,391,714, 2013
Pocket-held container
G Seliga, C Kownacki
US Patent App. 10/025,711, 2003
Accelerated quantized multiply-and-add operations
DM Vantrease, R Huang, R Diamant, T Elmer, S Amirineni
US Patent 10,678,508, 2020
CMOS nanophotonics: technology, system implications, and a CMP case study
JH Ahn, RG Beausoleil, N Binkert, A Davis, M Fiorentino, NP Jouppi, ...
Low Power Networks-on-Chip, 223-254, 2011
Performing concurrent operations in a processing element
DM Vantrease, R Diamant
US Patent 10,459,876, 2019
Cache Showdown: The Good, Bad, and Ugly
B Mehta, D Vantrease, L Yen
Project Report, Computer Sciences Department, University of Wisconsin Madison, 2004
Processing for multiple input data sets
DM Vantrease, R Diamant, TA Volpe, R Huang
US Patent App. 15/933,201, 2019
Reducing computations for data including padding
DM Vantrease, R Diamant
US Patent 10,990,650, 2021
Accelerated quantized multiply-and-add operations
DM Vantrease, R Huang, R Diamant, T Elmer, S Amirineni
US Patent 10,983,754, 2021
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