| Automatic generation of efficient accelerators for reconfigurable hardware D Koeplinger, R Prabhakar, Y Zhang, C Delimitrou, C Kozyrakis, ... 2016 ACM/IEEE 43rd Annual International Symposium on Computer Architecture …, 2016 | 98 | 2016 |
| Plasticine: A reconfigurable architecture for parallel patterns R Prabhakar, Y Zhang, D Koeplinger, M Feldman, T Zhao, S Hadjis, ... 2017 ACM/IEEE 44th Annual International Symposium on Computer Architecture …, 2017 | 94 | 2017 |
| Spatial: A language and compiler for application accelerators D Koeplinger, M Feldman, R Prabhakar, Y Zhang, S Hadjis, R Fiszel, ... Proceedings of the 39th ACM SIGPLAN Conference on Programming Language …, 2018 | 65 | 2018 |
| Generating configurable hardware from parallel patterns R Prabhakar, D Koeplinger, KJ Brown, HJ Lee, C De Sa, C Kozyrakis, ... Acm Sigplan Notices 51 (4), 651-665, 2016 | 63 | 2016 |
| Practical design space exploration L Nardi, D Koeplinger, K Olukotun 2019 IEEE 27th International Symposium on Modeling, Analysis, and Simulation …, 2019 | 17 | 2019 |
| Photoacoustic microscopy with a pulsed multi-color source based on stimulated Raman scattering D Koeplinger, M Liu, T Buma 2011 IEEE International Ultrasonics Symposium, 296-299, 2011 | 17 | 2011 |
| Automatic generation of efficient accelerators for reconfigurable hardware. In 2016 ACM/IEEE 43rd Annual International Symposium on Computer Architecture (ISCA) D Koeplinger, R Prabhakar, Y Zhang, C Delimitrou, C Kozyrakis, ... Ieee, 115ś127, 2016 | 9 | 2016 |
| Hardware acceleration of lucky-region fusion (LRF) algorithm for image acquisition and processing W Maignan, D Koeplinger, GW Carhart, M Aubailly, F Kiamilev, JJ Liu Photonic Applications for Aerospace, Commercial, and Harsh Environments IV …, 2013 | 4 | 2013 |
| Plasticine: a reconfigurable accelerator for parallel patterns R Prabhakar, Y Zhang, D Koeplinger, M Feldman, T Zhao, S Hadjis, ... IEEE Micro 38 (3), 20-31, 2018 | 3 | 2018 |
| HyperMapper: a Practical Design Space Exploration Framework L Nardi, A Souza, D Koeplinger, K Olukotun 2019 IEEE 27th International Symposium on Modeling, Analysis, and Simulation …, 2019 | 1 | 2019 |
| Compiler Flow Logic for Reconfigurable Architectures DA Koeplinger, R Prabhakar, S Jairath US Patent App. 16/536,192, 2021 | | 2021 |
| Matrix normal/transpose read and a reconfigurable data processor including same DA Koeplinger, R Prabhakar, R Sivaramakrishnan, DB Jackson, M Luttrell US Patent 10,768,899, 2020 | | 2020 |
| DSLS to Reconfigurable Hardware: Design of the Spatial Language and Compiler DA Koeplinger PQDT-Global, 2019 | | 2019 |
| Scrabble Assistant D Koeplinger | | |
| Adding Support for Staged Functions in Spatial D Koeplinger, T Swamy def 4, 5, 0 | | |
