| Ara: A 1-GHz+ scalable and energy-efficient RISC-V vector processor with multiprecision floating-point support in 22-nm FD-SOI M Cavalcante, F Schuiki, F Zaruba, M Schaffner, L Benini IEEE Transactions on Very Large Scale Integration (VLSI) Systems 28 (2), 530-543, 2019 | 140 | 2019 |
| A scalable near-memory architecture for training deep neural networks on large in-memory datasets F Schuiki, M Schaffner, FK Gürkaynak, L Benini IEEE Transactions on Computers 68 (4), 484-497, 2019 | 108 | 2019 |
| The transprecision computing paradigm: Concept, design, and applications ACI Malossi, M Schaffner, A Molnos, L Gammaitoni, G Tagliavini, ... 2018 Design, Automation & Test in Europe Conference & Exhibition (DATE …, 2018 | 91 | 2018 |
| BYOC: a" bring your own core" framework for heterogeneous-ISA research J Balkind, K Lim, M Schaffner, F Gao, G Chirkov, A Li, A Lavrov, ... Proceedings of the Twenty-Fifth International Conference on Architectural …, 2020 | 68 | 2020 |
| OpenPiton+ Ariane: The first open-source, SMP Linux-booting RISC-V system scaling from one to many cores J Balkind, K Lim, F Gao, J Tu, D Wentzlaff, M Schaffner, F Zaruba, L Benini Workshop on Computer Architecture Research with RISC-V (CARRV), 1-6, 2019 | 63 | 2019 |
| Design and Evaluation of a Low-Power Sensor Device for Induced Rockfall Experiments A Caviezel, M Schaffner, L Cavigelli, P Niklaus, Y Bühler, P Bartelt, ... IEEE Transactions on Instrumentation and Measurement 67 (4), 767-779, 2018 | 56 | 2018 |
| The relevance of rock shape over mass—implications for rockfall hazard assessments A Caviezel, A Ringenbach, SE Demmel, CE Dinneen, N Krebs, Y Bühler, ... Nature communications 12 (1), 5546, 2021 | 46 | 2021 |
| Network-accelerated non-contiguous memory transfers S Di Girolamo, K Taranov, A Kurth, M Schaffner, T Schneider, J Beránek, ... Proceedings of the International Conference for High Performance Computing …, 2019 | 34 | 2019 |
| 4.6 A 65nm CMOS 6.4-to-29.2 pJ/FLOP@ 0.8 V shared logarithmic floating point unit for acceleration of nonlinear function kernels in a tightly coupled processor cluster M Gautschi, M Schaffner, FK Gürkaynak, L Benini 2016 IEEE International Solid-State Circuits Conference (ISSCC), 82-83, 2016 | 29 | 2016 |
| StoneNode: A low-power sensor device for induced rockfall experiments P Niklaus, T Birchler, T Aebi, M Schaffner, L Cavigelli, A Caviezel, ... 2017 IEEE Sensors Applications Symposium (SAS), 1-6, 2017 | 25 | 2017 |
| DRAM or no-DRAM? Exploring linear solver architectures for image domain warping in 28 nm CMOS M Schaffner, FK Gürkaynak, A Smolic, L Benini Design, Automation & Test in Europe Conference & Exhibition (DATE), 2015 …, 2015 | 23 | 2015 |
| SYNFI: pre-silicon fault analysis of an open-source secure element P Nasahl, M Osorio, P Vogel, M Schaffner, T Trippel, D Rizzo, S Mangard arXiv preprint arXiv:2205.04775, 2022 | 21 | 2022 |
| FPGA implementation of a Kalman-based motion estimator for levitated nanoparticles J Liao, M Jost, M Schaffner, M Magno, M Korb, L Benini, F Tebbenjohanns, ... IEEE Transactions on Instrumentation and Measurement 68 (7), 2374-2386, 2018 | 17 | 2018 |
| An Extended Shared Logarithmic Unit for Nonlinear Function Kernel Acceleration in a 65-nm CMOS Multicore Cluster M Gautschi, M Schaffner, FK Gürkaynak, L Benini IEEE Journal of Solid-State Circuits 52 (1), 98-112, 2017 | 16 | 2017 |
| On the feasibility of FPGA acceleration of molecular dynamics simulations M Schaffner, L Benini arXiv preprint arXiv:1808.04201, 2018 | 15 | 2018 |
| An approximate computing technique for reducing the complexity of a direct-solver for sparse linear systems in real-time video processing M Schaffner, FK Gürkaynak, A Smolic, H Kaeslin, L Benini Proceedings of the 51st Annual Design Automation Conference, 1-6, 2014 | 15 | 2014 |
| Analysis and VLSI implementation of EWA rendering for real-time HD video applications P Greisen, M Schaffner, S Heinzle, M Runo, A Smolic, A Burg, H Kaeslin, ... IEEE transactions on circuits and systems for video technology 22 (11), 1577 …, 2012 | 15 | 2012 |
| NTX: An energy-efficient streaming accelerator for floating-point generalized reduction workloads in 22 nm FD-SOI F Schuiki, M Schaffner, L Benini 2019 Design, Automation & Test in Europe Conference & Exhibition (DATE), 662-667, 2019 | 13 | 2019 |
| Efficient stereo to multiview rendering using interleaved rendering AAA Smolic, P Greisen, S Heinzle, M Schaffner, F Ka US Patent 9,565,414, 2017 | 13 | 2017 |
| Towards Edge-Aware Spatio-Temporal Filtering in Real-Time M Schaffner, F Scheidegger, L Cavigelli, H Kaeslin, L Benini, A Smolic IEEE Transactions on Image Processing 27 (1), 265, 2018 | 12 | 2018 |
Luca BeniniETH Zürich, Università di BolognaVerified email at unibo.it
