Emre Ozer
Emre Ozer
Arm Research
Bestätigte E-Mail-Adresse bei arm.com
TitelZitiert vonJahr
Managing cache coherency in a data processing apparatus
E Özer, SD Biles, SA Ford
US Patent 7,937,535, 2011
2702011
Scale-out processors
P Lotfi-Kamran, B Grot, M Ferdman, S Volos, O Kocberber, J Picorel, ...
ACM SIGARCH Computer Architecture News 40 (3), 500-511, 2012
2042012
Unified assign and schedule: A new approach to scheduling for clustered register file microarchitectures
E Ozer, S Banerjia, TM Conte
Proceedings. 31st Annual ACM/IEEE International Symposium on …, 1998
2021998
Cache miss detection in a data processing apparatus
M Ghosh, E Özer, SD Biles
US Patent 8,099,556, 2012
792012
Multiple thread instruction fetch from different cache levels
E Özer, SD Biles
US Patent 7,769,955, 2010
792010
Contention management for a hardware transactional memory
G Blake, TN Mudge, SD Biles, NYS Chong, E Ozer, RG Dreslinski
US Patent App. 12/292,565, 2009
692009
Way guard: a segmented counting bloom filter approach to reducing energy for set-associative caches
M Ghosh, E Ozer, S Ford, S Biles, HHS Lee
Proceedings of the 2009 ACM/IEEE international symposium on Low power …, 2009
442009
Instruction issue control within a multi-threaded in-order superscalar processor
E Özer, V Vasekin, SD Biles
US Patent 7,707,390, 2010
412010
Weld: A multithreading technique towards latency-tolerant VLIW processors
E Özer, TM Conte, S Sharma
International Conference on High-Performance Computing, 192-203, 2001
342001
Processor and System-on-chip Simulation
R Leupers, O Temam
Springer, 2010
312010
Predicting room occupancy with a single passive infrared (PIR) sensor through behavior extraction
YP Raykov, E Ozer, G Dasika, A Boukouvalas, MA Little
Proceedings of the 2016 ACM International Joint Conference on Pervasive and …, 2016
302016
Data processing apparatus and method for managing multiple program threads executed by processing circuitry
E Özer, SD Biles
US Patent 8,205,206, 2012
292012
A stochastic bitwidth estimation technique for compact and low-power custom processors
E Özer, AP Nisbet, D Gregg
ACM Transactions on Embedded Computing Systems (TECS) 7 (3), 34, 2008
292008
Stochastic bit-width approximation using extreme value theory for customizable processors
E Özer, AP Nisbet, D Gregg
International Conference on Compiler Construction, 250-264, 2004
292004
Multiple-valued logic buses for reducing bus energy in low-power systems
E Özer, R Sendag, D Gregg
IEE Proceedings-Computers and Digital Techniques 153 (4), 270-282, 2006
282006
Data processing apparatus and method for updating prediction data based on an operation's priority level
E Özer, AD Reid, SD Biles
US Patent 7,805,595, 2010
25*2010
Accessing a Cache in a Data Processing Apparatus
SA Ford, M Ghosh, E Ozer, SD Biles
US Patent App. 12/224,725, 2009
242009
High-performance and low-cost dual-thread VLIW processor using Weld architecture paradigm
E Ozer, TM Conte
IEEE Transactions on Parallel and Distributed Systems 16 (12), 1132-1142, 2005
242005
Method, system and device for error correction in reading memory devices
M EYOLE, S Das, E Ozer, X ITURBE
US Patent App. 10/224,099, 2019
222019
Reducing energy of virtual cache synonym lookup using bloom filters
DH Woo, M Ghosh, E Özer, S Biles, HHS Lee
Proceedings of the 2006 international conference on Compilers, architecture …, 2006
212006
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