D Basu
D Basu
Intel Corporation
Bestätigte E-Mail-Adresse bei utexas.edu
Zitiert von
Zitiert von
Electrostatics improvement in 3-D tri-gate over ultra-thin body planar InGaAs quantum well field effect transistors with high-K gate dielectric and scaled gate-to-drain/gate-to …
M Radosavljevic, G Dewey, D Basu, J Boardman, B Chu-Kung, ...
2011 International Electron Devices Meeting, 33.1. 1-33.1. 4, 2011
Effect of edge roughness on electronic transport in graphene nanoribbon channel metal-oxide-semiconductor field-effect transistors
D Basu, MJ Gilbert, LF Register, SK Banerjee, AH MacDonald
Applied Physics Letters 92 (4), 042114, 2008
Graphene for CMOS and beyond CMOS applications
SK Banerjee, LF Register, E Tutuc, D Basu, S Kim, D Reddy, ...
Proceedings of the IEEE 98 (12), 2032-2046, 2010
Non-planar semiconductor device having channel region with low band-gap cladding layer
M Radosavljevic, G Dewey, B Chu-Kung, D Basu, SK Gardner, S Suri, ...
US Patent 8,785,909, 2014
Tight-binding study of electron-hole pair condensation in graphene bilayers: Gate control and system-parameter dependence
D Basu, LF Register, D Reddy, AH MacDonald, SK Banerjee
Physical Review B 82 (7), 075409, 2010
An explicit surface-potential-based MOSFET model incorporating the quantum mechanical effects
D Basu, AK Dutta
Solid-state electronics 50 (7-8), 1299-1309, 2006
Surface roughness exacerbated performance degradation in silicon nanowire transistors
D Basu, MJ Gilbert, SK Banerjee
Journal of Vacuum Science & Technology B: Microelectronics and Nanometer …, 2006
Effect of interlayer bare tunneling on electron-hole coherence in graphene bilayers
D Basu, LF Register, AH MacDonald, SK Banerjee
Physical Review B 84 (3), 035449, 2011
Compact model for ultrathin low electron effective mass double gate MOSFET
AS Roy, SP Mudanai, D Basu, MA Stettler
IEEE Transactions on Electron Devices 61 (2), 308-313, 2013
Scaling effect on specific contact resistivity in nano-scale metal-semiconductor contacts
SH Park, N Kharche, D Basu, Z Jiang, SK Nayak, CE Weber, G Hegde, ...
71st Device Research Conference, 125-126, 2013
Ballistic band-to-band tunneling in the OFF state in InGaAs MOSFETs
D Basu, R Kotlyar, CE Weber, MA Stettler
IEEE Transactions on Electron Devices 61 (10), 3417-3422, 2014
From coherent states in adjacent graphene layers toward low-power logic circuits
LF Register, D Basu, D Reddy
Using TCAD, response surface model and Monte Carlo methods to model processes and reduce device variation
D Basu, J Guha, P Hatab, P Vaidyanathan, C Mouli, SK Groothuis
2009 International Conference on Simulation of Semiconductor Processes and …, 2009
Effect of elastic processes and ballistic recovery in silicon nanowire transistors
D Basu, MJ Gilbert, SK Banerjee
Journal of Computational Electronics 6 (1-3), 113-116, 2007
Quantum transport and bulk calculations for graphene-based devices
D Basu
Microelectronics: The Beginning of the End or the End of the Beginning?
SK Banerjee
Texas ECE| Department of Electrical and Computer Engineering| The University …, 0
Source or drain structures for germanium n-channel devices
R Keech, B Chu-Kung, S Rafique, D Merrill, A Agrawal, H Kennel, Y Cao, ...
US Patent App. 16/368,088, 2020
Reducing off-state leakage in semiconductor devices
D Basu, CE Weber, JR Weber, ST Ma, HW Kennel, SH Sung, GA Glass, ...
US Patent App. 16/649,287, 2020
Reduced electric field by thickening dielectric on the drain side
D Basu, ST Ma, W Rachmady, JT Kavalieros
US Patent App. 16/651,294, 2020
Source contact and channel interface to reduce body charging from band-to-band tunneling
D Basu, R Mehandru, SH Sung
US Patent App. 16/649,593, 2020
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