On-chip TSV testing for 3D IC before bonding using sense amplification PY Chen, CW Wu, DM Kwai 2009 Asian Test Symposium, 450-455, 2009 | 176 | 2009 |
On-chip testing of blind and open-sleeve TSVs for 3D IC before bonding PY Chen, CW Wu, DM Kwai 2010 28th VLSI Test Symposium (VTS), 263-268, 2010 | 152 | 2010 |
Method for testing through-silicon-via and the circuit thereof CW Wu, PY Chen, DM Kwai, YF Chou US Patent 8,531,199, 2013 | 46 | 2013 |
A memory yield improvement scheme combining built-in self-repair and error correction codes TH Wu, PY Chen, M Lee, BY Lin, CW Wu, CH Tien, HC Lin, H Chen, ... 2012 IEEE International Test Conference, 1-9, 2012 | 36 | 2012 |
Method for testing through-silicon-via and the circuit thereof CW WU, PY Chen, DM Kwai, YF Chou US Patent App. 12/572,030, 2011 | 34 | 2011 |
Generalization of an enhanced ECC methodology for low power PSRAM PY Chen, CL Su, CH Chen, CW Wu IEEE Transactions on Computers 62 (7), 1318-1331, 2012 | 17 | 2012 |
An enhanced EDAC methodology for low power PSRAM PY Chen, YT Yeh, CH Chen, JC Yeh, CW Wu, J Lee, Y Lin 2006 IEEE International Test Conference, 1-10, 2006 | 16 | 2006 |
Cost modeling and analysis for interposer-based three-dimensional IC YW Chou, PY Chen, M Lee, CW Wu 2012 IEEE 30th VLSI Test Symposium (VTS), 108-113, 2012 | 12 | 2012 |
Method for testing through-silicon-via CW Wu, PY Chen, DM Kwai, YF Chou US Patent 8,937,486, 2015 | 7 | 2015 |
WRAP: weight RemApping and processing in RRAM-based neural network accelerators considering thermal effect PY Chen, FY Gu, YH Huang, C Lin 2022 Design, Automation & Test in Europe Conference & Exhibition (DATE …, 2022 | 4 | 2022 |
Improving testing and diagnosis efficiency for regular memory arrays TY Wu, PY Chen, CW Wu, DM Kwai Proceedings of 2010 International Symposium on VLSI Design, Automation and …, 2010 | 3 | 2010 |
適用於低功耗虛擬靜態隨機存取記憶體的增強型錯誤更正碼方法與適用於三維整合晶片的堆疊前穿矽孔測試技術 PY Chen 清華大學電機工程學系所學位論文 2012, 1-114, 2012 | | 2012 |
適於三維晶片黏合前實施的穿矽孔測試技術 陳柏源, 周永發, 蒯定明, 吳誠文 電腦與通訊, 94-102, 2010 | | 2010 |