| Overview of a compiler for synthesizing MATLAB programs onto FPGAs P Banerjee, M Haldar, A Nayak, V Kim, V Saxena, S Parkes, D Bagchi, ... IEEE Transactions on Very Large Scale Integration (VLSI) Systems 12 (3), 312-324, 2004 | 75 | 2004 |
| Parallel genetic algorithms for simulation-based sequential circuit test generation D Krishnaswamy, MS Hsiao, V Saxena, EM Rudnick, JH Patel, ... Proceedings Tenth International Conference on VLSI Design, 475-481, 1997 | 51 | 1997 |
| Monte-Carlo approach for power estimation in sequential circuits V Saxena, FN Najm, IN Hajj Proceedings European Design and Test Conference. ED & TC 97, 416-420, 1997 | 38 | 1997 |
| System and method for estimating power consumption of a circuit thourgh the use of an energy macro table V Saxena, R Mehra US Patent 6,810,482, 2004 | 27 | 2004 |
| System for architecture and resource specification and methods to compile the specification onto hardware A Nayak, M Haldar, A Choudhary, V Saxena, P Banerjee US Patent 7,376,939, 2008 | 25 | 2008 |
| TOGAPS: a testability oriented genetic algorithm for pipeline synthesis CP Ravikumar, V Saxena VLSI Design 5 (1), 77-87, 1996 | 17 | 1996 |
| AccelFPGA: A DSP Design Tool for Making Area Delay Tradeoffs While Mapping MATLAB Programs onto FPGAs P Banerjee, M Haldar, A Nayak, V Kim, V Saxena, R Anderson, J Uribe Proc. Int. Signal Processing Conference (ISPC), 2003 | 13 | 2003 |
| Estimation of state line statistics in sequential circuits V Saxena, FN Najm, IN Hajj ACM Transactions on Design Automation of Electronic Systems (TODAES) 7 (3 …, 2002 | 13 | 2002 |
| Method and apparatus for improving efficiency of constraint solving MA Iyer, V Saxena US Patent 7,353,216, 2008 | 12 | 2008 |
| Synthesis of testable pipelined datapaths using genetic search CP Ravikumar, V Saxena Proceedings of 9th International Conference on VLSI Design, 205-210, 1996 | 9 | 1996 |
| Systems and methods for determining relevance of place data LZ Yanez, SP Singh, C Sheth, A AuYoung, S Yang, V Saxena US Patent App. 15/829,487, 2019 | 7 | 2019 |
| Deep learning coordinate prediction using satellite and service data CP Sheth, M Yi, LZ Yanez, S Yang, SP Singh, A AuYoung, V Saxena US Patent 10,699,398, 2020 | 4 | 2020 |
| Using sensor data for coordinate prediction SP Singh, U Madhow, V Saxena, LZ Yanez, CP Sheth, S Yang, ... US Patent 10,809,083, 2020 | 3 | 2020 |
| Systems and methods for evaluating accuracy of place data based on context LZ Yanez, SP Singh, C Sheth, A AuYoung, S Yang, V Saxena US Patent App. 15/829,573, 2019 | 3 | 2019 |
| Detecting attribute change from trip data A AuYoung, LZ Yanez, KE DeHovitz, TD Herringshaw, JL Ross, V Saxena, ... US Patent 10,984,060, 2021 | 2 | 2021 |
| Polyline matching to map data for routing a trip J Jiao, B Gurakan, V Saxena, HA Razvi US Patent App. 16/450,560, 2019 | 2 | 2019 |
| Study Of School Based Service Software: With Reference To Fedena V Saxena, B Kakkar, K Gupta Journal of Engineering, Computers & Applied Sciences 2 (6), 2013 | 2 | 2013 |
| Making area-performance tradeoffs at the high level using the AccelFPGA compiler for FPGAs P Banerjee, V Saxena, J Uribe, M Haldar, A Nayak, V Kim, D Bagchi, ... Proceedings of the 2003 ACM/SIGDA eleventh international symposium on Field …, 2003 | 2 | 2003 |
| Statistical power estimation for sequential CMOS circuits V Saxena Coordinated Science Laboratory Report no. UILU-ENG-96-2229, DAC-55, 1996 | 2 | 1996 |
| Method and system for smart data input relay R Satapathy, S Vemulapati, K Gupta, V Saxena, G Mishra US Patent 9,940,352, 2018 | 1 | 2018 |
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