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Tsung-Wei Huang
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Zitiert von
Zitiert von
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OpenTimer: A high-performance timing analysis tool
TW Huang, MDF Wong
2015 IEEE/ACM International Conference on Computer-Aided Design (ICCAD), 895-902, 2015
1572015
Taskflow: A Lightweight Parallel and Heterogeneous Task Graph Computing System
TW Huang, DL Lin, CX Lin, Y Lin
IEEE Transactions on Parallel and Distributed Systems 33 (6), 1303-1320, 2022
1392022
A fast routability-and performance-driven droplet routing algorithm for digital microfluidic biochips
TW Huang, TY Ho
2009 IEEE International Conference on Computer Design, 445-450, 2009
1032009
Cpp-taskflow: Fast task-based parallel programming using modern c++
TW Huang, CX Lin, G Guo, M Wong
2019 IEEE International Parallel and Distributed Processing Symposium (IPDPS …, 2019
962019
OpenTimer v2: A new parallel incremental timing analysis engine
TW Huang, G Guo, CX Lin, MDF Wong
IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2021
842021
Gpu-accelerated static timing analysis
Z Guo, TW Huang, Y Lin
Proceedings of the 39th international conference on computer-aided design, 1-9, 2020
752020
A reliability-oriented placement algorithm for reconfigurable digital microfluidic biochips using 3-D deferred decision making technique
YH Chen, CL Hsu, LC Tsai, TW Huang, TY Ho
IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2013
652013
Reliability-oriented broadcast electrode-addressing for pin-constrained digital microfluidic biochips
TW Huang, TY Ho, K Chakrabarty
2011 IEEE/ACM International Conference on Computer-Aided Design (ICCAD), 448-455, 2011
642011
A contamination aware droplet routing algorithm for the synthesis of digital microfluidic biochips
TW Huang, CH Lin, TY Ho
IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2010
632010
A two-stage integer linear programming-based droplet routing algorithm for pin-constrained digital microfluidic biochips
TW Huang, TY Ho
IEEE transactions on computer-aided design of integrated circuits and …, 2011
542011
A network-flow based pin-count aware routing algorithm for broadcast-addressing EWOD chips
TW Huang, SY Yeh, TY Ho
IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2011
432011
GPU-accelerated Path-based Timing Analysis
G Guo, TW Huang, M Wong
2021 IEEE/ACM Design Automation Conference (DAC), 2021
422021
UI-Timer 1.0: An Ultra-Fast Path-Based Timing Analysis Algorithm for CPPR
TW Huang, M Wong
IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2016
412016
Voltage-aware chip-level design for reliability-driven pin-constrained EWOD chips
SH Yeh, JW Chang, TW Huang, TY Ho
Proceedings of the International Conference on Computer-Aided Design, 353-360, 2012
412012
A contamination aware droplet routing algorithm for digital microfluidic biochips
TW Huang, CH Lin, TY Ho
2009 IEEE/ACM International Conference on Computer-Aided Design-Digest of …, 2009
392009
A two-stage ILP-based droplet routing algorithm for pin-constrained digital microfluidic biochips
TW Huang, TY Ho
Proceedings of the 19th international symposium on Physical design, 201-208, 2010
372010
An efficient work-stealing scheduler for task dependency graph
CX Lin, TW Huang, MDF Wong
2020 IEEE 26th international conference on parallel and distributed systems …, 2020
352020
From rtl to cuda: A gpu acceleration flow for rtl simulation with batch stimulus
DL Lin, H Ren, Y Zhang, B Khailany, TW Huang
Proceedings of the 51st International Conference on Parallel Processing, 1-12, 2022
342022
Efficient GPU Computation Using Task Graph Parallelism
DL Lin, TW Huang
European Conference on Parallel Processing, 435-450, 2021
332021
A novel inference algorithm for large sparse neural network using task graph parallelism
DL Lin, TW Huang
2020 IEEE High Performance Extreme Computing Conference (HPEC), 1-7, 2020
322020
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