| Efficiency of a glitch detector against electromagnetic fault injection L Zussa, A Dehbaoui, K Tobich, JM Dutertre, P Maurine, ... 2014 Design, Automation & Test in Europe Conference & Exhibition (DATE), 1-6, 2014 | 107 | 2014 |
| Power supply glitch induced faults on FPGA: An in-depth analysis of the injection mechanism L Zussa, JM Dutertre, J Clediere, A Tria 2013 IEEE 19th International On-Line Testing Symposium (IOLTS), 110-115, 2013 | 91 | 2013 |
| Investigation of timing constraints violation as a fault injection means L Zussa, JM Dutertre, J Clédiere, B Robisson, A Tria 27th Conference on Design of Circuits and Integrated Systems (DCIS), Avignon …, 2012 | 71 | 2012 |
| Analysis of the fault injection mechanism related to negative and positive power supply glitches using an on-chip voltmeter L Zussa, JM Dutertre, J Clediere, B Robisson 2014 IEEE International Symposium on Hardware-Oriented Security and Trust …, 2014 | 44 | 2014 |
| Evidence of an information leakage between logically independent blocks L Zussa, I Exurville, JM Dutertre, JB Rigaud, B Robisson, A Tria, ... Proceedings of the Second Workshop on Cryptography and Security in Computing …, 2015 | 8 | 2015 |
| Jessy Clediere, and Assia Tria. Efficiency of a Glitch Detector Against Electromagnetic Fault Injection. In 2014 Design, Automation & Test in Europe Conference & Exhibition (DATE) L Zussa, A Dehbaoui, K Tobich, JM Dutertre, P Maurine, ... IEEE 9, 17, 2014 | 8 | 2014 |
| Jessy Clediere, and Assia Tria. Power supply glitch induced faults on FPGA: An in-depth analysis of the injection mechanism. In 2013 IEEE 19th International On-Line Testing … L Zussa, JM Dutertre IEEE, jul, 2013 | 4 | 2013 |
| Étude des techniques d'injection de fautes par violation de contraintes temporelles permettant la cryptanalyse physique de circuits sécurisés L Zussa Ecole Nationale Supérieure des Mines de Saint-Etienne, 2014 | 3 | 2014 |
| From physical stresses to timing constraints violation L Zussa, JM Dutertre, J Clédière, A Tria Forth International Workshop on Constructive Side-Channel Analysis and …, 2013 | 3 | 2013 |
| Analysis of a fault injection mechanism related to voltage glitches using an on-chip voltmeter L Zussa, JM Dutertre, J Clédière, B Robisson TRUDEVICE Workshop (colocated with ETS 2014), 2014 | | 2014 |
| independent blocks L Zussa, I Exurville, JM Dutertre, JB Rigaud, B Robisson, A Tria, ... | | |
| 8.3 Physical Attacks and countermeasures F Regazzoni, CH Alari, L Zussa, A Dehbaoui, K Tobich, JM Dutertre, ... | | |
