| Verifying large multipliers by combining SAT and computer algebra D Kaufmann, A Biere, M Kauers 2019 Formal Methods in Computer Aided Design (FMCAD), 28-36, 2019 | 72 | 2019 |
| Column-wise verification of multipliers using computer algebra D Ritirc, A Biere, M Kauers 2017 Formal Methods in Computer Aided Design (FMCAD), 23-30, 2017 | 61 | 2017 |
| Improving and extending the algebraic approach for verifying gate-level multipliers D Ritirc, A Biere, M Kauers 2018 Design, Automation & Test in Europe Conference & Exhibition (DATE …, 2018 | 36 | 2018 |
| Incremental column-wise verification of arithmetic circuits using computer algebra D Kaufmann, A Biere, M Kauers Formal Methods in System Design 56, 22-54, 2020 | 20 | 2020 |
| AMulet 2.0 for Verifying Multiplier Circuits D Kaufmann, A Biere Tools and Algorithms for the Construction and Analysis of Systems27th …, 2021 | 19 | 2021 |
| Formal Verification of Multiplier Circuits using Computer Algebra D Kaufmann Institute of Formal Models and Verification, Johannes Kepler University Linz, 2020 | 15 | 2020 |
| A practical polynomial calculus for arithmetic circuit verification D Ritirc, A Biere, M Kauers 3rd International Workshop on Satisfiability Checking and Symbolic …, 2018 | 15 | 2018 |
| From DRUP to PAC and back D Kaufmann, A Biere, M Kauers 2020 Design, Automation & Test in Europe Conference & Exhibition (DATE), 654-657, 2020 | 12 | 2020 |
| Arithmetic verification problems submitted to the SAT Race 2019 D Kaufmann, M Kauers, A Biere, D Cok Proc. of SAT Race 2019, 2019 | 12 | 2019 |
| SAT, computer algebra, multipliers D Kaufmann, A Biere, M Kauers Vampire, 1-18, 2018 | 12 | 2018 |
| The Proof Checkers Pacheck and Pasteque for the Practical Algebraic Calculus D Kaufmann, M Fleury, A Biere 2020 Formal Methods in Computer Aided Design (FMCAD) 1, 264-269, 2020 | 11* | 2020 |
| Adding dual variables to algebraic reasoning for gate-level multiplier verification D Kaufmann, P Beame, A Biere, J Nordström 2022 Design, Automation & Test in Europe Conference & Exhibition (DATE …, 2022 | 8 | 2022 |
| Nullstellensatz-proofs for multiplier verification D Kaufmann, A Biere Computer Algebra in Scientific Computing: 22nd International Workshop, CASC …, 2020 | 7 | 2020 |
| Challenges in verifying arithmetic circuits using computer algebra A Biere, M Kauers, D Ritirc 2017 19th International Symposium on Symbolic and Numeric Algorithms for …, 2017 | 5 | 2017 |
| Formally Modeling and Analyzing Mathematical Algorithms with Software Specification Languages & Tools D Ritirc Master’s thesis, RISC, Johannes Kepler University, Linz, Austria, 2016 | 5 | 2016 |
| Improving AMulet2 for verifying multiplier circuits using SAT solving and computer algebra D Kaufmann, A Biere International Journal on Software Tools for Technology Transfer 25 (2), 133-144, 2023 | 4 | 2023 |
| Practical algebraic calculus and Nullstellensatz with the checkers Pacheck and Pastèque and Nuss-Checker D Kaufmann, M Fleury, A Biere, M Kauers Formal Methods in System Design, 1-35, 2022 | 2 | 2022 |
| SMT Solving over Finite Field Arithmetic T Hader, D Kaufmann, L Kovács arXiv preprint arXiv:2305.00028, 2023 | 1 | 2023 |
| Fuzzing-Based Grammar Inference H Sochor, F Ferrarotti, D Kaufmann International Conference on Model and Data Engineering, 72-86, 2022 | 1 | 2022 |
| Formal Verification of Integer Multiplier Circuits using Algebraic Reasoning-A Survey D Kaufmann Recent Findings in Boolean Techniques: Selected Papers from the 14th …, 2021 | 1 | 2021 |
Armin BiereProfessor of Computer Science, University of FreiburgBestätigte E-Mail-Adresse bei informatik.uni-freiburg.de
