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Daniela Kaufmann
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Column-wise verification of multipliers using computer algebra
D Ritirc, A Biere, M Kauers
2017 Formal Methods in Computer Aided Design (FMCAD), 23-30, 2017
522017
Verifying large multipliers by combining SAT and computer algebra
D Kaufmann, A Biere, M Kauers
2019 Formal Methods in Computer Aided Design (FMCAD), 28-36, 2019
452019
Improving and extending the algebraic approach for verifying gate-level multipliers
D Ritirc, A Biere, M Kauers
2018 Design, Automation & Test in Europe Conference & Exhibition (DATE …, 2018
272018
Incremental column-wise verification of arithmetic circuits using computer algebra
D Kaufmann, A Biere, M Kauers
Formal Methods in System Design 56 (1), 22-54, 2020
162020
A practical polynomial calculus for arithmetic circuit verification
D Ritirc, A Biere, M Kauers
3rd International Workshop on Satisfiability Checking and Symbolic …, 2018
132018
Formal Verification of Multiplier Circuits using Computer Algebra
D Kaufmann
Institute of Formal Models and Verification, Johannes Kepler University Linz, 2020
122020
AMulet 2.0 for Verifying Multiplier Circuits
D Kaufmann, A Biere
Tools and Algorithms for the Construction and Analysis of Systems27th …, 2021
112021
Arithmetic verification problems submitted to the SAT Race 2019
D Kaufmann, M Kauers, A Biere, D Cok
Proc. of SAT Race 2019, 2019
102019
SAT, computer algebra, multipliers
D Kaufmann, A Biere, M Kauers
Vampire, 1-18, 2018
92018
From DRUP to PAC and back
D Kaufmann, A Biere, M Kauers
2020 Design, Automation & Test in Europe Conference & Exhibition (DATE), 654-657, 2020
72020
The Proof Checkers Pacheck and Pasteque for the Practical Algebraic Calculus
D Kaufmann, M Fleury, A Biere
2020 Formal Methods in Computer Aided Design (FMCAD) 1, 264-269, 2020
7*2020
Challenges in verifying arithmetic circuits using computer algebra
A Biere, M Kauers, D Ritirc
2017 19th International Symposium on Symbolic and Numeric Algorithms for …, 2017
52017
Formally Modeling and Analyzing Mathematical Algorithms with Software Specification Languages & Tools
D Ritirc
Master’s thesis, RISC, Johannes Kepler University, Linz, Austria, 2016
52016
Nullstellensatz-proofs for multiplier verification
D Kaufmann, A Biere
International Workshop on Computer Algebra in Scientific Computing, 368-389, 2020
42020
Practical algebraic calculus and Nullstellensatz with the checkers Pacheck and Pastèque and Nuss-Checker
D Kaufmann, M Fleury, A Biere, M Kauers
Formal Methods in System Design, 1-35, 2022
12022
Adding dual variables to algebraic reasoning for gate-level multiplier verification
D Kaufmann, P Beame, A Biere, J Nordström
2022 Design, Automation & Test in Europe Conference & Exhibition (DATE …, 2022
12022
Fuzzing and Delta Debugging And-Inverter Graph Verification Tools
D Kaufmann, A Biere
International Conference on Tests and Proofs, 69-88, 2022
2022
Formale Verifikation von Multiplizierern mit Computeralgebra
D Kaufmann
Ausgezeichnete Informatikdissertationen 2020, 2021
2021
Formal Verification of Integer Multiplier Circuits using Algebraic Reasoning-A Survey
D Kaufmann
Recent Findings in Boolean Techniques: Selected Papers from the 14th …, 2021
2021
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