| An expanded evaluation of protein function prediction methods shows an improvement in accuracy Y Jiang, TR Oron, WT Clark, AR Bankapur, D D’Andrea, R Lepore, ... Genome biology 17 (1), 1-19, 2016 | 258 | 2016 |
| Fault injection techniques and tools for embedded systems reliability evaluation A Benso, P Prinetto Springer Science & Business Media, 2003 | 258 | 2003 |
| AC/C++ source-to-source compiler for dependable applications A Benso, S Chiusano, P Prinetto, L Tagliaferri Proceeding International Conference on Dependable Systems and Networks. DSN …, 2000 | 100 | 2000 |
| Fault-list collapsing for fault-injection experiments A Benso, M Rebaudengo, L Impagliazzo, P Marmo Annual Reliability and Maintainability Symposium. 1998 Proceedings …, 1998 | 76 | 1998 |
| A watchdog processor to detect data and control flow errors A Benso, S Di Carlo, G Di Natale, P Prinetto 9th IEEE On-Line Testing Symposium, 2003. IOLTS 2003., 144-148, 2003 | 72 | 2003 |
| The CAFA challenge reports improved protein function prediction and new functional annotations for hundreds of genes through experimental screens N Zhou, Y Jiang, TR Bergquist, AJ Lee, BZ Kacsoh, AW Crocker, ... Genome biology 20 (1), 1-23, 2019 | 67 | 2019 |
| An on-line BIST RAM architecture with self-repair capabilities A Benso, S Chiusano, G Di Natale, P Prinetto IEEE Transactions on Reliability 51 (1), 123-128, 2002 | 64 | 2002 |
| Control-flow checking via regular expressions A Benso, S Di Carlo, G Di Natale, P Prinetto, L Tagliaferri Proceedings 10th Asian Test Symposium, 299-303, 2001 | 57 | 2001 |
| HD/sup 2/BIST: a hierarchical framework for BIST scheduling, data patterns delivering and diagnosis in SoCs A Benso, S Chiusano, S Di Carlo, P Prinetto, F Ricciato, M Spadari, ... Proceedings International Test Conference 2000 (IEEE Cat. No. 00CH37159 …, 2000 | 50 | 2000 |
| Fault behavior observation of a microprocessor system through a VHDL simulation-based fault injection experiment AM Amendola, A Benso, F Corno, L Impagliazzo, P Marmo, P Prinetto, ... Proceedings EURO-DAC'96. European Design Automation Conference with EURO …, 1996 | 48 | 1996 |
| March AB, March AB1: new March tests for unlinked dynamic memory faults A Benso, A Bosio, S Di Carlo, G Di Natale, P Prinetto IEEE International Conference on Test, 2005., 8 pp.-841, 2005 | 45 | 2005 |
| A programmable BIST architecture for clusters of multiple-port SRAMs A Benso, S Di Carlo, G Di Natale, P Prinetto, ML Bodoni Proceedings International Test Conference 2000 (IEEE Cat. No. 00CH37159 …, 2000 | 45 | 2000 |
| IEEE standard 1500 compliance verification for embedded cores A Benso, S Di Carlo, P Prinetto, Y Zorian IEEE transactions on very large scale integration (VLSI) systems 16 (4), 397-407, 2008 | 41 | 2008 |
| Statistical reliability estimation of microprocessor-based systems A Savino, S Di Carlo, G Politano, A Benso, A Bosio, G Di Natale IEEE Transactions on Computers 61 (11), 1521-1534, 2011 | 39 | 2011 |
| EXFI: a low-cost fault injection system for embedded microprocessor-based boards A Benso, P Prinetto, M Rebaudengo, MS Reorda ACM Transactions on Design Automation of Electronic Systems (TODAES) 3 (4 …, 1998 | 39 | 1998 |
| An effective distributed BIST architecture for RAMs ML Bodoni, A Benso, S Chiusano, S Di Carlo, G Di Natale, P Prinetto Proceedings IEEE European Test Workshop, 119-124, 2000 | 37 | 2000 |
| Data criticality estimation in software applications A Benso, S Di Carlo, G Di Natale, P Prinetto, L Tagliaferri International test conference, 802-810, 2003 | 34 | 2003 |
| Specification and design of a new memory fault simulator A Benso, S Di Carlo, G Di Natale, P Prinetto Proceedings of the 11th Asian Test Symposium, 2002.(ATS'02)., 92-97, 2002 | 34 | 2002 |
| A fault injection environment for microprocessor-based boards A Benso, P Prinetto, M Rebaudengo, MS Reorda Proceedings International Test Conference 1998 (IEEE Cat. No. 98CH36270 …, 1998 | 33 | 1998 |
| A functional verification based fault injection environment A Benso, A Bosio, S Di Carlo, R Mariani 22nd IEEE International Symposium on Defect and Fault-Tolerance in VLSI …, 2007 | 32 | 2007 |
Paolo PRINETTOProfessor of Computer Engineering, Politecnico di Torino, Torino (Italy)Verified email at polito.it
