| System, apparatus and method for instruction level behavioral analysis without binary instrumentation K Yamada, T Ince, PA Campbell, JY Chen US Patent 10,565,379, 2020 | 9 | 2020 |
| Technologies for shadow stack manipulation for binary translation systems T Ince, K Yamada, P Caprioli, J Lu US Patent 9,477,453, 2016 | 9 | 2016 |
| Control transfer instructions indicating intent to call or return P Caprioli, K Yamada, T Ince US Patent App. 14/870,417, 2017 | 5 | 2017 |
| Profile-driven selective program loading T Ince, J Hollingsworth Euro-Par 2010-Parallel Processing, 62-73, 2010 | 2 | 2010 |
| On-demand binary translation state map generation T Ince, K Yamada US Patent 11,210,074, 2021 | 1 | 2021 |
| Compilation and binary editing for performance and security T Ince University of Maryland, College Park, 2013 | 1 | 2013 |
| Visualizing Regression Test Results R Chen, T Ince | 1 | |
| ON-DEMAND BINARY TRANSLATION STATE MAP GENERATION T Ince, K Yamada US Patent App. 17/561,544, 2022 | | 2022 |
| System, apparatus and method for performing on-demand binary analysis for detecting code reuse attacks T Ince, K Yamada, A Harikumar, A Nayshtut US Patent 10,395,033, 2019 | | 2019 |
| System for binary translation version protection T Ince, K Yamada US Patent App. 10/162,616, 2018 | | 2018 |
| Compiler help for binary manipulation tools T Ince, JK Hollingsworth European Conference on Parallel Processing, 404-413, 2012 | | 2012 |
| Compiler-Assisted Binary Parsing T Ince | | |
Jeffrey HollingsworthProfessor of Computer Science, University of MarylandVerified email at umd.edu
