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Tahir Khan
Tahir Khan
Freescale Semiconductor, Maxim Integrated, Rensselaer Polytechnic Institute
Bestätigte E-Mail-Adresse bei chicagobooth.edu
Titel
Zitiert von
Zitiert von
Jahr
Enhancement-mode n-channel GaN MOSFETs on p and n-GaN/sapphire substrates
W Huang, T Khan, TP Chow
2006 IEEE International Symposium on Power Semiconductor Devices and IC's, 1-4, 2006
1912006
Comparison of MOS capacitors on n-and p-type GaN
W Huang, T Khan, T Paul Chow
Journal of electronic materials 35, 726-732, 2006
882006
The effect of gate oxide processes on the performance of 4H-SiC MOSFETs and gate-controlled diodes
Y Wang, K Tang, T Khan, MK Balasubramanian, H Naik, W Wang, ...
IEEE transactions on electron devices 55 (8), 2046-2053, 2008
642008
Semiconductor device with increased snapback voltage
BH Grote, VK Khemka, TA Khan, W Huang, R Zhu
US Patent 8,193,585, 2012
422012
Methods of making laterally double diffused metal oxide semiconductor transistors having a reduced surface field structure
BH Grote, TA Khan, VK Khemka, R Zhu
US Patent 8,623,732, 2014
302014
Guard ring integrated LDMOS
VK Khemka, SJ Cosentino, TA Khan, AC Reyes, R Zhu
US Patent 8,278,710, 2012
262012
MOS capacitor structures
TA Khan, A Bose, VK Khemka, R Zhu
US Patent 8,134,222, 2012
262012
Semiconductor device and method
VK Khemka, TA Khan, W Huang, R Zhu
US Patent 8,344,472, 2013
232013
Electronic device with capcitively coupled floating buried layer
VK Khemka, TA Khan, R Zhu, W Huang, BH Grote
US Patent 8,338,872, 2012
212012
LDMOS with enhanced safe operating area (SOA) and method therefor
TA Khan, VK Khemka, R Zhu
US Patent 8,330,220, 2012
172012
Semiconductor device and related manufacturing method
TA Khan, BH Grote, VK Khemka, R Zhu
US Patent App. 12/882,899, 2012
162012
A high voltage Super-Junction NLDMOS device implemented in 0.13 µm SOI based Smart Power IC technology
R Zhu, V Khemka, T Khan, W Huang, X Cheng, P Hui, M Ger, P Rodriquez
2010 22nd International Symposium on Power Semiconductor Devices & IC's …, 2010
162010
Rugged dotted-channel LDMOS structure
T Khan, V Khemka, R Zhu, A Bose
2008 IEEE International Electron Devices Meeting, 1-4, 2008
142008
Combined lateral vertical RESURF (CLAVER) LDMOS structure
T Khan, V Khemka, R Zhu, W Huang, X Cheng, P Hui, M Ger, B Grote, ...
2009 21st International Symposium on Power Semiconductor Devices & IC's, 13-16, 2009
122009
Robust deep trench isolation
V Khemka, A Bose, MC Butner, BH Grote, TA Khan, S Shen, R Zhu
US Patent 7,608,908, 2009
102009
Experimental demonstration of enhancement mode GaN MOSFETs
W Huang, TP Chow, T Khan
physica status solidi (a) 204 (6), 2064-2067, 2007
82007
Integrated MOS power transistor with body extension region for poly field plate depletion assist
V Khemka, R Zhu, TA Khan, BH Grote
US Patent 8,969,958, 2015
72015
Asymmetric interface densities on n and p type GaN MOS capacitors
W Huang, T Khan, TP Chow
Materials science forum 527, 1525-1528, 2006
72006
Optimization of 4H-SiC MOS properties with cesium implantation
Y Wang, T Khan, TP Chow
Materials Science Forum 600, 751-754, 2009
62009
Integrated MOS power transistor with poly field plate extension for depletion assist
V Khemka, R Zhu, TA Khan, BH Grote
US Patent 8,963,241, 2015
52015
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