Rui Bai
Rui Bai
Bestätigte E-Mail-Adresse bei
Zitiert von
Zitiert von
Silicon photonic transceiver circuits with microring resonator bias-based wavelength stabilization in 65 nm CMOS
C Li, R Bai, A Shafik, EZ Tabasy, B Wang, G Tang, C Ma, CH Chen, ...
IEEE journal of solid-state circuits 49 (6), 1419-1436, 2014
A ring-resonator-based silicon photonics transceiver with bias-based wavelength stabilization and adaptive-power-sensitivity receiver
C Li, R Bai, A Shafik, EZ Tabasy, G Tang, C Ma, CH Chen, Z Peng, ...
2013 IEEE International Solid-State Circuits Conference Digest of Technical …, 2013
A 0.47–0.66 pJ/bit, 4.8–8 Gb/s I/O transceiver in 65 nm CMOS
YH Song, R Bai, K Hu, HW Yang, PY Chiang, S Palermo
IEEE journal of solid-state circuits 48 (5), 1276-1289, 2013
A 25 Gb/s hybrid-integrated silicon photonic source-synchronous receiver with microring wavelength stabilization
K Yu, C Li, H Li, A Titriku, A Shafik, B Wang, Z Wang, R Bai, CH Chen, ...
IEEE Journal of Solid-State Circuits 51 (9), 2129-2141, 2016
22.4 A 24Gb/s 0.71 pJ/b Si-photonic source-synchronous receiver with adaptive equalization and microring wavelength stabilization
K Yu, H Li, C Li, A Titriku, A Shafik, B Wang, Z Wang, R Bai, CH Chen, ...
2015 IEEE International Solid-State Circuits Conference-(ISSCC) Digest of …, 2015
0.16-0.25 pJ/bit, 8 Gb/s Near-Threshold Serial Link Receiver With Super-Harmonic Injection-Locking
K Hu, R Bai, T Jiang, C Ma, A Ragab, S Palermo, PY Chiang
IEEE journal of solid-state circuits 47 (8), 1842-1853, 2012
A 0.8 V, 560fJ/bit, 14Gb/s injection-locked receiver with input duty-cycle distortion tolerable edge-rotating 5/4X sub-rate CDR in 65nm CMOS
H Li, S Chen, L Yang, R Bai, W Hu, FY Zhong, S Palermo, PY Chiang
2014 Symposium on VLSI Circuits Digest of Technical Papers, 1-2, 2014
2.5 A 0.25 pJ/b 0.7 V 16Gb/s 3-tap decision-feedback equalizer in 65nm CMOS
R Bai, S Palermo, PY Chiang
2014 IEEE International Solid-State Circuits Conference Digest of Technical …, 2014
Hybrid integrated DWDM silicon photonic transceiver with self-adaptive CMOS circuits
CH Chen, C Li, R Bai, A Shafik, M Fiorentino, Z Peng, P Chiang, ...
2013 Optical Interconnects Conference, 122-123, 2013
A 51Gb/s, 320mW, PAM4 CDR with baud-rate sampling for high-speed optical interconnects
N Qi, Y Kang, Q Lin, J Ma, J Shi, B Yin, C Liu, R Bai, S Hu, J Wang, J Du, ...
2017 IEEE Asian Solid-State Circuits Conference (A-SSCC), 89-92, 2017
Silicon photonic microring resonator-based transceivers for compact WDM optical interconnects
S Palermo, P Chiang, C Li, CH Chen, M Fiorentino, R Beausoleil, H Li, ...
2015 IEEE Compound Semiconductor Integrated Circuit Symposium (CSICS), 1-4, 2015
DWDM silicon photonic transceivers for optical interconnect
CH Chen, C Li, R Bai, K Yu, JM Fedeli, S Meassoudene, M Fournier, ...
J. Solid-State Circuits (JSSC) 49, 2014
A 50Gb/s-PAM4 CDR with on-chip eye opening monitor for reference-level and clock-sampling adaptation
L Chang, B Yin, T Yao, N Qi, D Li, J Shi, J Wang, H Shang, R Bai, ...
Optical Fiber Communication Conference, Tu2C. 4, 2018
A 25Gbps, 2x-oversampling CDR using a zero-crossing linearizing phase detector
Z Wang, R Bai, J Wang, X Jing, Q Nan, L Sun, CP Yue, Z Hong, ...
2014 IEEE Radio Frequency Integrated Circuits Symposium, 271-274, 2014
A fully integrated 25 Gb/s low-noise TIA+ CDR optical receiver designed in 40-nm-CMOS
J Wang, Q Pan, Y Qin, X Chen, S Hu, R Bai, X Wang, Y Cai, T Xia, ...
IEEE Transactions on Circuits and Systems II: Express Briefs 66 (10), 1698-1702, 2019
4× 30 Gbps 155mW/channel VCSEL driver in 65nm CMOS
J Wang, N Qi, Z Wang, Q Yang, H Guo, R Bai, Z Hong, PY Chiang
2015 IEEE Optical Interconnects Conference (OI), 111-112, 2015
A 50Gb/s PAM-4 Retimer-CDR+ VCSEL Driver with Asymmetric Pulsed Pre-Emphasis Integrated into a Single CMOS Die
S Hu, T Yao, B Yin, C Song, L Zhao, J Wang, L Wang, R Bai, X Wang, ...
2019 Optical Fiber Communications Conference and Exhibition (OFC), 1-3, 2019
A low-cost, system-on-chip for Optical Time Domain Reflectometry (OTDR)
J Shi, N Qi, Q Yang, H Guo, G Yang, J Du, Q Liu, Z He, R Bai, PY Chiang, ...
2016 IEEE MTT-S International Wireless Symposium (IWS), 1-4, 2016
Design Techniques for Signal Reflection Suppression in High-Speed 25-Gb/s Laser Drivers in CMOS
J Shi, B Yin, N Qi, R Bai, Z Li, Z Hong, PY Chiang
IEEE Photonics Technology Letters 30 (1), 39-42, 2017
Clock and data recovery circuit
W Zhongkai, R Bai, PY Chiang
US Patent 9,219,599, 2015
Das System kann den Vorgang jetzt nicht ausführen. Versuchen Sie es später erneut.
Artikel 1–20