| Design and applications of approximate circuits by gate-level pruning J Schlachter, V Camus, KV Palem, C Enz IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 99:1-99:9, 2017 | 101 | 2017 |
| Review and benchmarking of precision-scalable multiply-accumulate unit architectures for embedded neural-network processing V Camus, L Mei, C Enz, M Verhelst IEEE Journal on Emerging and Selected Topics in Circuits and Systems (JETCAS), 2019 | 84 | 2019 |
| Approximate 32-bit floating-point unit design with 53% power-area product reduction V Camus, J Schlachter, M Gautschi, FK Gurkaynak, C Enz 2016 IEEE 42nd European Solid-State Circuits Conference (ESSCIRC), 465-468, 2016 | 53 | 2016 |
| Energy-efficient inexact speculative adder with high performance and accuracy control V Camus, J Schlachter, C Enz 2015 IEEE International Symposium on Circuits and Systems (ISCAS), 45-48, 2015 | 50 | 2015 |
| A low-power carry cut-back approximate adder with fixed-point implementation and floating-point precision V Camus, J Schlachter, C Enz 2016 ACM/EDAC/IEEE 53rd Design Automation Conference (DAC), 127:1-127:6, 2016 | 48 | 2016 |
| Survey of precision-scalable multiply-accumulate units for neural-network processing V Camus, C Enz, M Verhelst 2019 IEEE 1st International Conference on Artificial Intelligence Circuits …, 2019 | 37 | 2019 |
| Automatic generation of inexact digital circuits by gate-level pruning J Schlachter, V Camus, C Enz, KV Palem 2015 IEEE International Symposium on Circuits and Systems (ISCAS), 173-176, 2015 | 31 | 2015 |
| Design of approximate circuits by fabrication of false timing paths: The carry cut-back adder V Camus, M Cacciotti, J Schlachter, C Enz IEEE Journal on Emerging and Selected Topics in Circuits and Systems (JETCAS), 2018 | 29 | 2018 |
| Near/sub-threshold circuits and approximate computing: The perfect combination for ultra-low-power systems J Schlachter, V Camus, C Enz 2015 IEEE Computer Society Annual Symposium on VLSI (ISVLSI), 476-480, 2015 | 27 | 2015 |
| Approximate FPGA implementation of CORDIC for tactile data processing using speculative adders M Franceschi, V Camus, A Ibrahim, C Enz, M Valle 2017 IEEE New Generation of Circuits and Systems Conference (NGCAS), 41-44, 2017 | 13 | 2017 |
| Combining structural and timing errors in overclocked inexact speculative adders X Jiao, V Camus, M Cacciotti, Y Jiang, C Enz, RK Gupta 2017 IEEE Design, Automation & Test in Europe Conference & Exhibition (DATE …, 2017 | 13 | 2017 |
| Energy-efficient digital design through inexact and approximate arithmetic circuits V Camus, J Schlachter, C Enz 2015 IEEE 13th International New Circuits and Systems Conference (NEWCAS), 1-4, 2015 | 13 | 2015 |
| Hardware acceleration of HDR-image tone mapping on an FPGA-CPU platform through high-level synthesis M Cacciotti, V Camus, J Schlachter, A Pezzotta, C Enz 2018 IEEE International System-on-Chip Conference (SOCC), 2018 | 9 | 2018 |
| CASSIS: Characterization with adaptive sample-size inferential statistics applied to inexact circuits J Bonnot, V Camus, K Desnos, D Menard 2018 IEEE 26th European Signal Processing Conference (EUSIPCO), 682-686, 2018 | 9 | 2018 |
| System and method for optimization of digital circuits with timing and behavior co-designed by introduction and exploitation of false paths V Camus, J Schlachter, C Enz US Patent App. 15/159,836, 2017 | 9 | 2017 |
| Design of energy-efficient discrete cosine transform using pruned arithmetic circuits J Schlachter, V Camus, C Enz 2016 IEEE International Symposium on Circuits and Systems (ISCAS), 341-344, 2016 | 7 | 2016 |
| Adaptive simulation-based framework for error characterization of inexact circuits J Bonnot, V Camus, K Desnos, D Menard Microelectronics Reliability 96, 60-70, 2019 | 5 | 2019 |
| Cross-layer inexact design for low-power applications (poster) V Camus, G Karakonstantis, J Schlachter, AP Burg, C Enz 2014 NanoTera Annual Meeting, 2014 | 1 | 2014 |
| Quantum technology: Single-photon source (arXiv research extract only) V Camus National Institute of Informatics (NII), Tokyo, Japan, 2012 | 1* | 2012 |
| Design of approximate and precision-scalable circuits for embedded multimedia and neural-network processing V Camus EPFL, 2019 | | 2019 |
Christian EnzEcole Polytechnique Fédérale de Lausanne (EPFL)Bestätigte E-Mail-Adresse bei epfl.ch
