| DLA: Compiler and FPGA overlay for neural network inference acceleration MS Abdelfattah, D Han, A Bitar, R DiCecco, S O'Connell, N Shanker, ... 2018 28th International Conference on Field Programmable Logic and …, 2018 | 102 | 2018 |
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| IBM's POWER10 Processor J Vasiljevic, L Bajic, D Capalija, S Sokorac, D Ignjatovic, L Bajic, ... IEEE MICRO 41 (2), 50-55, 2021 | | 2021 |
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